From 0d8632f08990baba13f1b5654295b41d694fbb74 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 11 Feb 2017 12:23:22 +0000 Subject: [PATCH] [X86] Regenerate CLMUL commutation tests. llvm-svn: 294839 --- llvm/test/CodeGen/X86/commute-clmul.ll | 73 ++++++++++++++------------ 1 file changed, 39 insertions(+), 34 deletions(-) diff --git a/llvm/test/CodeGen/X86/commute-clmul.ll b/llvm/test/CodeGen/X86/commute-clmul.ll index d13911abc864..84d9a914c9bb 100644 --- a/llvm/test/CodeGen/X86/commute-clmul.ll +++ b/llvm/test/CodeGen/X86/commute-clmul.ll @@ -1,59 +1,64 @@ -; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+sse2,+pclmul < %s | FileCheck %s --check-prefix=SSE -; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+avx2,+pclmul < %s | FileCheck %s --check-prefix=AVX +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+pclmul | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+pclmul | FileCheck %s --check-prefix=AVX declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone define <2 x i64> @commute_lq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { - ;SSE-LABEL: commute_lq_lq - ;SSE: pclmulqdq $0, (%rdi), %xmm0 - ;SSE-NEXT: retq - - ;AVX-LABEL: commute_lq_lq - ;AVX: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 - ;AVX-NEXT: retq - +; SSE-LABEL: commute_lq_lq: +; SSE: # BB#0: +; SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: commute_lq_lq: +; AVX: # BB#0: +; AVX-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 +; AVX-NEXT: retq %1 = load <2 x i64>, <2 x i64>* %a0 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 0) ret <2 x i64> %2 } define <2 x i64> @commute_lq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { - ;SSE-LABEL: commute_lq_hq - ;SSE: pclmulqdq $1, (%rdi), %xmm0 - ;SSE-NEXT: retq - - ;AVX-LABEL: commute_lq_hq - ;AVX: vpclmulqdq $1, (%rdi), %xmm0, %xmm0 - ;AVX-NEXT: retq - +; SSE-LABEL: commute_lq_hq: +; SSE: # BB#0: +; SSE-NEXT: pclmulqdq $1, (%rdi), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: commute_lq_hq: +; AVX: # BB#0: +; AVX-NEXT: vpclmulqdq $1, (%rdi), %xmm0, %xmm0 +; AVX-NEXT: retq %1 = load <2 x i64>, <2 x i64>* %a0 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 16) ret <2 x i64> %2 } define <2 x i64> @commute_hq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { - ;SSE-LABEL: commute_hq_lq - ;SSE: pclmulqdq $16, (%rdi), %xmm0 - ;SSE-NEXT: retq - - ;AVX-LABEL: commute_hq_lq - ;AVX: vpclmulqdq $16, (%rdi), %xmm0, %xmm0 - ;AVX-NEXT: retq - +; SSE-LABEL: commute_hq_lq: +; SSE: # BB#0: +; SSE-NEXT: pclmulqdq $16, (%rdi), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: commute_hq_lq: +; AVX: # BB#0: +; AVX-NEXT: vpclmulqdq $16, (%rdi), %xmm0, %xmm0 +; AVX-NEXT: retq %1 = load <2 x i64>, <2 x i64>* %a0 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 1) ret <2 x i64> %2 } define <2 x i64> @commute_hq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { - ;SSE-LABEL: commute_hq_hq - ;SSE: pclmulqdq $17, (%rdi), %xmm0 - ;SSE-NEXT: retq - - ;AVX-LABEL: commute_hq_hq - ;AVX: vpclmulqdq $17, (%rdi), %xmm0, %xmm0 - ;AVX-NEXT: retq - +; SSE-LABEL: commute_hq_hq: +; SSE: # BB#0: +; SSE-NEXT: pclmulqdq $17, (%rdi), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: commute_hq_hq: +; AVX: # BB#0: +; AVX-NEXT: vpclmulqdq $17, (%rdi), %xmm0, %xmm0 +; AVX-NEXT: retq %1 = load <2 x i64>, <2 x i64>* %a0 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 17) ret <2 x i64> %2