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Replace copyRegToReg with copyPhysReg for PowerPC. 

llvm-svn: 108083
This commit is contained in:
Jakob Stoklund Olesen 2010-07-11 07:31:00 +00:00
parent f889e280b8
commit 0d611979a8
2 changed files with 29 additions and 35 deletions
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54
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
View File

@ -340,36 +340,32 @@ PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
return 2; return 2;
} }
bool PPCInstrInfo::copyRegToReg(MachineBasicBlock &MBB, void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC, bool KillSrc) const {
const TargetRegisterClass *SrcRC, unsigned Opc;
DebugLoc DL) const { if (PPC::GPRCRegClass.contains(DestReg, SrcReg))
if (DestRC != SrcRC) { Opc = PPC::OR;
// Not yet supported! else if (PPC::G8RCRegClass.contains(DestReg, SrcReg))
return false; Opc = PPC::OR8;
} else if (PPC::F4RCRegClass.contains(DestReg, SrcReg))
Opc = PPC::FMR;
else if (PPC::CRRCRegClass.contains(DestReg, SrcReg))
Opc = PPC::MCRF;
else if (PPC::VRRCRegClass.contains(DestReg, SrcReg))
Opc = PPC::VOR;
else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg))
Opc = PPC::CROR;
else
llvm_unreachable("Impossible reg-to-reg copy");
if (DestRC == PPC::GPRCRegisterClass) { const TargetInstrDesc &TID = get(Opc);
BuildMI(MBB, MI, DL, get(PPC::OR), DestReg).addReg(SrcReg).addReg(SrcReg); if (TID.getNumOperands() == 3)
} else if (DestRC == PPC::G8RCRegisterClass) { BuildMI(MBB, I, DL, TID, DestReg)
BuildMI(MBB, MI, DL, get(PPC::OR8), DestReg).addReg(SrcReg).addReg(SrcReg); .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc));
} else if (DestRC == PPC::F4RCRegisterClass || else
DestRC == PPC::F8RCRegisterClass) { BuildMI(MBB, I, DL, TID, DestReg).addReg(SrcReg, getKillRegState(KillSrc));
BuildMI(MBB, MI, DL, get(PPC::FMR), DestReg).addReg(SrcReg);
} else if (DestRC == PPC::CRRCRegisterClass) {
BuildMI(MBB, MI, DL, get(PPC::MCRF), DestReg).addReg(SrcReg);
} else if (DestRC == PPC::VRRCRegisterClass) {
BuildMI(MBB, MI, DL, get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg);
} else if (DestRC == PPC::CRBITRCRegisterClass) {
BuildMI(MBB, MI, DL, get(PPC::CROR), DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
// Attempt to copy register that is not GPR or FPR
return false;
}
return true;
} }
bool bool

10
llvm/lib/Target/PowerPC/PPCInstrInfo.h
View File

@ -111,12 +111,10 @@ public:
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond, const SmallVectorImpl<MachineOperand> &Cond,
DebugLoc DL) const; DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB, virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC, bool KillSrc) const;
const TargetRegisterClass *SrcRC,
DebugLoc DL) const;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB, virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,