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Add intrinsic-based patterns for MMX PINSRW and PEXTRW. 

llvm-svn: 113420
This commit is contained in:
Dale Johannesen 2010-09-08 22:08:40 +00:00
parent e177863afc
commit 0d2e6ad504
1 changed files with 19 additions and 0 deletions
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19
llvm/lib/Target/X86/X86InstrMMX.td
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@ -518,6 +518,11 @@ def MMX_PEXTRWri : MMXIi8<0xC5, MRMSrcReg,
"pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set GR32:$dst, (X86pextrw (v4i16 VR64:$src1),
(iPTR imm:$src2)))]>;
def MMX_PEXTRWirri: MMXIi8<0xC5, MRMSrcReg,
(outs GR32:$dst), (ins VR64:$src1, i32i8imm:$src2),
"pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set GR32:$dst, (int_x86_mmx_pextr_w VR64:$src1,
(iPTR imm:$src2)))]>;
let Constraints = "$src1 = $dst" in {
def MMX_PINSRWrri : MMXIi8<0xC4, MRMSrcReg,
(outs VR64:$dst),
@ -533,6 +538,20 @@ let Constraints = "$src1 = $dst" in {
(v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1),
(i32 (anyext (loadi16 addr:$src2))),
(iPTR imm:$src3))))]>;
def MMX_PINSRWirri : MMXIi8<0xC4, MRMSrcReg,
(outs VR64:$dst),
(ins VR64:$src1, GR32:$src2, i32i8imm:$src3),
"pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR64:$dst, (int_x86_mmx_pinsr_w VR64:$src1,
GR32:$src2, (iPTR imm:$src3)))]>;
def MMX_PINSRWirmi : MMXIi8<0xC4, MRMSrcMem,
(outs VR64:$dst),
(ins VR64:$src1, i16mem:$src2, i32i8imm:$src3),
"pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR64:$dst, (int_x86_mmx_pinsr_w VR64:$src1,
(i32 (anyext (loadi16 addr:$src2))),
(iPTR imm:$src3)))]>;
}
// MMX to XMM for vector types