R600/SI: Fix live range error hidden by SIFoldOperands

m0 is treated as a virtual register class with a single register
rather than the physical register it really is. This was updating
the live range of the used virtual copy of m0 from the first ds_read
instruction, and leaving the unused copy unchanged. This resulted in a
"Live segment doesn't end at a valid instruction" verifier error because
the erased instructions. Update the live range of the second copy (which
should be dead).

No test since I'm not sure how to trigger this with SIFoldOperands
enabled.

llvm-svn: 223203
This commit is contained in:
Matt Arsenault 2014-12-03 05:22:29 +00:00
parent 78116d7ace
commit 0d2832ae8d
1 changed files with 9 additions and 0 deletions

View File

@ -285,6 +285,15 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeRead2Pair(
LiveInterval &M0RegLI = LIS->getInterval(M0Reg->getReg());
LIS->shrinkToUses(&M0RegLI);
// Currently m0 is treated as a register class with one member instead of an
// implicit physical register. We are using the virtual register for the first
// one, but we still need to update the live range of the now unused second m0
// virtual register to avoid verifier errors.
const MachineOperand *PairedM0Reg
= TII->getNamedOperand(*Paired, AMDGPU::OpName::m0);
LiveInterval &PairedM0RegLI = LIS->getInterval(PairedM0Reg->getReg());
LIS->shrinkToUses(&PairedM0RegLI);
LIS->getInterval(DestReg); // Create new LI
DEBUG(dbgs() << "Inserted read2: " << *Read2 << '\n');