forked from OSchip/llvm-project
[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
Commit on behalf of mharoush After LGTM and check all: This patch enables usage of k registers in inline assembly syntax. Adding triple Reviewer: 1. rnk 2. delena Differential Revision: https://reviews.llvm.org/D25011 llvm-svn: 285563
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@ -2397,6 +2397,7 @@ static const char* const GCCRegNames[] = {
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"zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15",
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"zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23",
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"zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
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"k0", "k1", "k2", "k3", "k4", "k5", "k6", "k7",
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};
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const TargetInfo::AddlRegName AddlRegNames[] = {
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@ -0,0 +1,17 @@
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// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -O0 -S -o - -Wall -Werror | FileCheck %s
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// This test checks basic inline assembly recognition of k0-k7 registers for avx512.
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void test_basic_inline_asm_with_k_regs() {
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//CHECK: ## InlineAsm Start
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//CHECK: kandw %k1, %k2, %k3
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//CHECK: ## InlineAsm End
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asm("kandw %k1, %k2, %k3\t");
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//CHECK: ## InlineAsm Start
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//CHECK: kandw %k4, %k5, %k6
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//CHECK: ## InlineAsm End
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asm("kandw %k4, %k5, %k6\t");
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//CHECK: ## InlineAsm Start
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//CHECK: kandw %k7, %k0, %k1
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//CHECK: ## InlineAsm End
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asm("kandw %k7, %k0, %k1\t");
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}
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