Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.

llvm-svn: 140997
2011-10-03 08:14:29 +00:00 · 2011-10-03 08:14:29 +00:00 · 0d0be47d03
parent 2c5e91e2e5
commit 0d0be47d03
3 changed files with 9 additions and 0 deletions
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@ -1491,6 +1491,9 @@ static int readVVVV(struct InternalInstruction* insn) {
  else
    return -1;

+  if (insn->mode != MODE_64BIT)
+    insn->vvvv &= 0x7;
+
  return 0;
 }

--- a/llvm/test/MC/Disassembler/X86/simple-tests.txt
+++ b/llvm/test/MC/Disassembler/X86/simple-tests.txt
@ -365,3 +365,6 @@

 # CHECK: testq $0, %rax
 0x48 0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: vaddps	%xmm3, %xmm15, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3
--- a/llvm/test/MC/Disassembler/X86/x86-32.txt
+++ b/llvm/test/MC/Disassembler/X86/x86-32.txt
@ -384,3 +384,6 @@

 # CHECK: movl %eax, 0
 0xa3 0x00 0x00 0x00 0x00
+
+# CHECK: vaddps	%xmm3, %xmm7, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3