forked from OSchip/llvm-project
AVX-512: fixed asm string of vsqrtss
(vvsqrtss was generated before) llvm-svn: 254411
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@ -5911,12 +5911,12 @@ multiclass avx512_sqrt_scalar<bits<8> opc, string OpcodeStr,X86VectorVTInfo _,
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EVEX_B, EVEX_RC;
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let isCodeGenOnly = 1 in {
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def r : SI<opc, MRMSrcReg, (outs _.FRC:$dst),
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def r : I<opc, MRMSrcReg, (outs _.FRC:$dst),
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(ins _.FRC:$src1, _.FRC:$src2),
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OpcodeStr#"\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>;
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let mayLoad = 1 in
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def m : SI<opc, MRMSrcMem, (outs _.FRC:$dst),
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def m : I<opc, MRMSrcMem, (outs _.FRC:$dst),
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(ins _.FRC:$src1, _.ScalarMemOp:$src2),
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OpcodeStr#"\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>;
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}
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