forked from OSchip/llvm-project
[AArch64] Do not emit '#' before immediates in inline asm
Summary: The A64 assembly language does not require the '#' character to introduce constant immediate operands. Avoid the '#' since the AArch64 asm parser does not accept '#' before the lane specifier and rejects the following: __asm__ ("fmla v2.4s, v0.4s, v1.s[%0]" :: "I"(0x1)) Fix a test to not expect the '#' and add a new test case with the above asm. Fixes: https://github.com/android-ndk/ndk/issues/1036 Reviewers: peter.smith, kristof.beyls Subscribers: javed.absar, hiraditya, llvm-commits, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D65550 llvm-svn: 368320
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@ -492,8 +492,7 @@ void AArch64AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNum,
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break;
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}
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case MachineOperand::MO_Immediate: {
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int64_t Imm = MO.getImm();
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O << '#' << Imm;
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O << MO.getImm();
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break;
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}
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case MachineOperand::MO_GlobalAddress: {
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@ -81,9 +81,9 @@ define i32 @constraint_I(i32 %i, i32 %j) nounwind {
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entry:
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; CHECK-LABEL: constraint_I:
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%0 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}, $2", "=r,r,I"(i32 %i, i32 16773120) nounwind
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #16773120
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, 16773120
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%1 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}, $2", "=r,r,I"(i32 %i, i32 4096) nounwind
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #4096
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, 4096
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ret i32 %1
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}
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@ -91,13 +91,13 @@ define i32 @constraint_J(i32 %i, i32 %j, i64 %k) nounwind {
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entry:
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; CHECK-LABEL: constraint_J:
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%0 = tail call i32 asm sideeffect "sub ${0:w}, ${1:w}, $2", "=r,r,J"(i32 %i, i32 -16773120) nounwind
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #-16773120
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, -16773120
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%1 = tail call i32 asm sideeffect "sub ${0:w}, ${1:w}, $2", "=r,r,J"(i32 %i, i32 -1) nounwind
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #-1
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, -1
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%2 = tail call i64 asm sideeffect "sub ${0:x}, ${1:x}, $2", "=r,r,J"(i64 %k, i32 -1) nounwind
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #-1
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, -1
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%3 = tail call i64 asm sideeffect "sub ${0:x}, ${1:x}, $2", "=r,r,J"(i64 %k, i64 -1) nounwind
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #-1
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, -1
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ret i32 %1
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}
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@ -105,9 +105,9 @@ define i32 @constraint_KL(i32 %i, i32 %j) nounwind {
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entry:
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; CHECK-LABEL: constraint_KL:
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%0 = tail call i32 asm sideeffect "eor ${0:w}, ${1:w}, $2", "=r,r,K"(i32 %i, i32 255) nounwind
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; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, #255
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; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, 255
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%1 = tail call i32 asm sideeffect "eor ${0:w}, ${1:w}, $2", "=r,r,L"(i32 %i, i64 16711680) nounwind
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; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, #16711680
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; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, 16711680
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ret i32 %1
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}
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@ -115,9 +115,9 @@ define i32 @constraint_MN(i32 %i, i32 %j) nounwind {
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entry:
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; CHECK-LABEL: constraint_MN:
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%0 = tail call i32 asm sideeffect "movk ${0:w}, $1", "=r,M"(i32 65535) nounwind
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; CHECK: movk {{w[0-9]+}}, #65535
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; CHECK: movk {{w[0-9]+}}, 65535
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%1 = tail call i32 asm sideeffect "movz ${0:w}, $1", "=r,N"(i64 0) nounwind
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; CHECK: movz {{w[0-9]+}}, #0
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; CHECK: movz {{w[0-9]+}}, 0
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ret i32 %1
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}
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@ -178,13 +178,13 @@ define void @t13() nounwind {
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entry:
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; CHECK-LABEL: t13:
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tail call void asm sideeffect "mov x4, $0\0A", "N"(i64 1311673391471656960) nounwind
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; CHECK: mov x4, #1311673391471656960
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; CHECK: mov x4, 1311673391471656960
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tail call void asm sideeffect "mov x4, $0\0A", "N"(i64 -4662) nounwind
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; CHECK: mov x4, #-4662
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; CHECK: mov x4, -4662
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tail call void asm sideeffect "mov x4, $0\0A", "N"(i64 4660) nounwind
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; CHECK: mov x4, #4660
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; CHECK: mov x4, 4660
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call void asm sideeffect "mov x4, $0\0A", "N"(i64 -71777214294589696) nounwind
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; CHECK: mov x4, #-71777214294589696
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; CHECK: mov x4, -71777214294589696
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ret void
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}
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@ -192,13 +192,13 @@ define void @t14() nounwind {
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entry:
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; CHECK-LABEL: t14:
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tail call void asm sideeffect "mov w4, $0\0A", "M"(i32 305397760) nounwind
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; CHECK: mov w4, #305397760
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; CHECK: mov w4, 305397760
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tail call void asm sideeffect "mov w4, $0\0A", "M"(i32 -4662) nounwind
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; CHECK: mov w4, #4294962634
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; CHECK: mov w4, 4294962634
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tail call void asm sideeffect "mov w4, $0\0A", "M"(i32 4660) nounwind
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; CHECK: mov w4, #4660
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; CHECK: mov w4, 4660
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call void asm sideeffect "mov w4, $0\0A", "M"(i32 -16711936) nounwind
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; CHECK: mov w4, #4278255360
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; CHECK: mov w4, 4278255360
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ret void
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}
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@ -271,3 +271,12 @@ entry:
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tail call i32 asm sideeffect "ldr $0, $1 \0A", "=r,*Q"(i32* null)
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ret void
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}
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; No '#' in lane specifier
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define void @test_no_hash_in_lane_specifier() {
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; CHECK-LABEL: test_no_hash_in_lane_specifier
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; CHECK: fmla v2.4s, v0.4s, v1.s[1]
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; CHECK: ret
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tail call void asm sideeffect "fmla v2.4s, v0.4s, v1.s[$0]", "I"(i32 1) #1
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ret void
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}
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