forked from OSchip/llvm-project
ARM "l" constraint for inline asm means R0-R7, also for Thumb2.
This is consistent with llvm-gcc's arm/constraints.md. Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2 mode. llvm-svn: 93436
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@ -4258,10 +4258,10 @@ std::pair<unsigned, const TargetRegisterClass*>
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ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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EVT VT) const {
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if (Constraint.size() == 1) {
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// GCC RS6000 Constraint Letters
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// GCC ARM Constraint Letters
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switch (Constraint[0]) {
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case 'l':
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if (Subtarget->isThumb1Only())
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if (Subtarget->isThumb())
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return std::make_pair(0U, ARM::tGPRRegisterClass);
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else
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return std::make_pair(0U, ARM::GPRRegisterClass);
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