forked from OSchip/llvm-project
[IndVars] ICmpInst should not prevent IV widening
If we decided to widen IV with zext, then unsigned comparisons should not prevent widening (same for sext/sign comparisons). The result of comparison in wider type does not change in this case. Differential Revision: https://reviews.llvm.org/D92207 Reviewed By: nikic
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@ -1541,10 +1541,14 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) {
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bool CanZeroExtend = ExtKind == ZeroExtended && OBO->hasNoUnsignedWrap();
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auto AnotherOpExtKind = ExtKind;
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// Check that all uses are either s/zext, or narrow def (in case of we are
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// widening the IV increment), or single-input LCSSA Phis.
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// Check that all uses are either:
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// - narrow def (in case of we are widening the IV increment);
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// - single-input LCSSA Phis;
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// - comparison of the chosen type;
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// - extend of the chosen type (raison d'etre).
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SmallVector<Instruction *, 4> ExtUsers;
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SmallVector<PHINode *, 4> LCSSAPhiUsers;
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SmallVector<ICmpInst *, 4> ICmpUsers;
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for (Use &U : NarrowUse->uses()) {
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Instruction *User = cast<Instruction>(U.getUser());
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if (User == NarrowDef)
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@ -1558,6 +1562,19 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) {
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LCSSAPhiUsers.push_back(LCSSAPhi);
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continue;
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}
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if (auto *ICmp = dyn_cast<ICmpInst>(User)) {
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auto Pred = ICmp->getPredicate();
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// We have 3 types of predicates: signed, unsigned and equality
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// predicates. For equality, it's legal to widen icmp for either sign and
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// zero extend. For sign extend, we can also do so for signed predicates,
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// likeweise for zero extend we can widen icmp for unsigned predicates.
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if (ExtKind == ZeroExtended && ICmpInst::isSigned(Pred))
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return false;
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if (ExtKind == SignExtended && ICmpInst::isUnsigned(Pred))
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return false;
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ICmpUsers.push_back(ICmp);
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continue;
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}
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if (ExtKind == SignExtended)
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User = dyn_cast<SExtInst>(User);
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else
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@ -1655,6 +1672,26 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) {
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User->replaceAllUsesWith(TruncPN);
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DeadInsts.emplace_back(User);
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}
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for (ICmpInst *User : ICmpUsers) {
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Builder.SetInsertPoint(User);
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auto ExtendedOp = [&](Value * V)->Value * {
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if (V == NarrowUse)
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return WideBO;
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if (ExtKind == ZeroExtended)
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return Builder.CreateZExt(V, WideBO->getType());
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else
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return Builder.CreateSExt(V, WideBO->getType());
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};
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auto Pred = User->getPredicate();
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auto *LHS = ExtendedOp(User->getOperand(0));
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auto *RHS = ExtendedOp(User->getOperand(1));
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auto *WideCmp =
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Builder.CreateICmp(Pred, LHS, RHS, User->getName() + ".wide");
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User->replaceAllUsesWith(WideCmp);
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DeadInsts.emplace_back(User);
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}
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return true;
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}
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@ -795,37 +795,36 @@ failure:
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unreachable
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}
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; TODO: We can widen here despite the icmp user of %foo in guarded block.
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define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_unsigned_pos1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[START]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -1
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; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP2]], -1
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; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK-NEXT: [[ICMP_USER_WIDE4:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]]
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; CHECK-NEXT: br i1 [[ICMP_USER_WIDE4]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP3]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 -1 to i32
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; CHECK-NEXT: call void @use(i32 [[TMP4]])
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; CHECK-NEXT: ret i32 [[TMP4]]
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: [[FOO_LCSSA2_WIDE:%.*]] = phi i64 [ [[TMP3]], [[BACKEDGE]] ]
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; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[FOO_LCSSA2_WIDE]] to i32
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; CHECK-NEXT: call void @use(i32 [[TMP5]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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