forked from OSchip/llvm-project
[InstCombine] add/move tests for udiv; NFC
llvm-svn: 335544
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@ -1,6 +0,0 @@
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; RUN: opt < %s -instcombine -S | not grep div
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define i8 @test(i8 %x) readnone nounwind {
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%A = udiv i8 %x, 250
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ret i8 %A
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}
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@ -66,6 +66,58 @@ define <2 x i32> @sdiv_by_sext_minus1_vec(<2 x i1> %x, <2 x i32> %y) {
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ret <2 x i32> %div
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}
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define i8 @udiv_by_negative(i8 %x) {
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; CHECK-LABEL: @udiv_by_negative(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], -7
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; CHECK-NEXT: [[A:%.*]] = zext i1 [[TMP1]] to i8
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; CHECK-NEXT: ret i8 [[A]]
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;
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%A = udiv i8 %x, 250
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ret i8 %A
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}
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define i32 @udiv_by_minus1(i32 %A) {
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; CHECK-LABEL: @udiv_by_minus1(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], -1
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; CHECK-NEXT: [[B:%.*]] = zext i1 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[B]]
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;
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%B = udiv i32 %A, -1
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ret i32 %B
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}
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define <2 x i64> @udiv_by_minus1_vec(<2 x i64> %x) {
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; CHECK-LABEL: @udiv_by_minus1_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[X:%.*]], <i64 -1, i64 -1>
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; CHECK-NEXT: [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[DIV]]
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;
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%div = udiv <2 x i64> %x, <i64 -1, i64 -1>
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ret <2 x i64> %div
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}
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define i32 @udiv_by_sext_all_ones(i1 %x, i32 %y) {
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; CHECK-LABEL: @udiv_by_sext_all_ones(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[X:%.*]] to i32
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[Y:%.*]], [[SEXT]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%sext = sext i1 %x to i32
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%div = udiv i32 %y, %sext
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ret i32 %div
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}
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define <2 x i32> @udiv_by_sext_all_ones_vec(<2 x i1> %x, <2 x i32> %y) {
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; CHECK-LABEL: @udiv_by_sext_all_ones_vec(
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; CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i32> [[Y:%.*]], [[SEXT]]
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; CHECK-NEXT: ret <2 x i32> [[DIV]]
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;
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%sext = sext <2 x i1> %x to <2 x i32>
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%div = udiv <2 x i32> %y, %sext
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ret <2 x i32> %div
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}
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define i32 @test5(i32 %A) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i32 0
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