[WebAssembly] Add -m:e to the target triple.

This enables ELF-style name mangling, which primarily means using ".L" for private symbols. llvm-svn: 257020
2016-01-07 03:19:23 +00:00 · 2016-01-07 03:19:23 +00:00 · 0c6f5ac50a
parent a7324a2823
commit 0c6f5ac50a
47 changed files with 52 additions and 51 deletions
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@ -45,8 +45,9 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine(
    const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
    const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
    CodeGenOpt::Level OL)
-    : LLVMTargetMachine(T, TT.isArch64Bit() ? "e-p:64:64-i64:64-n32:64-S128"
-                                            : "e-p:32:32-i64:64-n32:64-S128",
+    : LLVMTargetMachine(T,
+                        TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
+                                         : "e-m:e-p:32:32-i64:64-n32:64-S128",
                        TT, CPU, FS, Options, RM, CM, OL),
      TLOF(make_unique<WebAssemblyTargetObjectFile>()) {
  // WebAssembly type-checks expressions, but a noreturn function with a return
--- a/llvm/test/CodeGen/WebAssembly/call.ll
+++ b/llvm/test/CodeGen/WebAssembly/call.ll
@ -2,7 +2,7 @@

 ; Test that basic call operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare i32 @i32_nullary()
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
@ -3,7 +3,7 @@

 ; Test the CFG stackifier pass.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare void @something()
--- a/llvm/test/CodeGen/WebAssembly/comparisons_f32.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_f32.ll
@ -3,7 +3,7 @@
 ; Test that basic 32-bit floating-point comparison operations assemble as
 ; expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: ord_f32:
--- a/llvm/test/CodeGen/WebAssembly/comparisons_f64.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_f64.ll
@ -3,7 +3,7 @@
 ; Test that basic 64-bit floating-point comparison operations assemble as
 ; expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: ord_f64:
--- a/llvm/test/CodeGen/WebAssembly/comparisons_i32.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_i32.ll
@ -2,7 +2,7 @@

 ; Test that basic 32-bit integer comparison operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: eq_i32:
--- a/llvm/test/CodeGen/WebAssembly/comparisons_i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_i64.ll
@ -2,7 +2,7 @@

 ; Test that basic 64-bit integer comparison operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: eq_i64:
--- a/llvm/test/CodeGen/WebAssembly/conv.ll
+++ b/llvm/test/CodeGen/WebAssembly/conv.ll
@ -2,7 +2,7 @@

 ; Test that basic conversion operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: i32_wrap_i64:
--- a/llvm/test/CodeGen/WebAssembly/copysign-casts.ll
+++ b/llvm/test/CodeGen/WebAssembly/copysign-casts.ll
@ -3,7 +3,7 @@
 ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get
 ; unfolded.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare double @copysign(double, double) nounwind readnone
--- a/llvm/test/CodeGen/WebAssembly/dead-vreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/dead-vreg.ll
@ -2,7 +2,7 @@

 ; Check that unused vregs aren't assigned registers.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
--- a/llvm/test/CodeGen/WebAssembly/f32.ll
+++ b/llvm/test/CodeGen/WebAssembly/f32.ll
@ -2,7 +2,7 @@

 ; Test that basic 32-bit floating-point operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare float @llvm.fabs.f32(float)
--- a/llvm/test/CodeGen/WebAssembly/f64.ll
+++ b/llvm/test/CodeGen/WebAssembly/f64.ll
@ -2,7 +2,7 @@

 ; Test that basic 64-bit floating-point operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare double @llvm.fabs.f64(double)
--- a/llvm/test/CodeGen/WebAssembly/fast-isel.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel.ll
@ -2,7 +2,7 @@
 ; RUN:   -fast-isel -fast-isel-abort=1 -verify-machineinstrs \
 ; RUN:   | FileCheck %s

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; This tests very minimal fast-isel functionality.
--- a/llvm/test/CodeGen/WebAssembly/frem.ll
+++ b/llvm/test/CodeGen/WebAssembly/frem.ll
@ -2,7 +2,7 @@

 ; Test that the frem instruction works.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: frem32:
--- a/llvm/test/CodeGen/WebAssembly/func.ll
+++ b/llvm/test/CodeGen/WebAssembly/func.ll
@ -2,7 +2,7 @@

 ; Test that basic functions assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: f0:
--- a/llvm/test/CodeGen/WebAssembly/global.ll
+++ b/llvm/test/CodeGen/WebAssembly/global.ll
@ -2,7 +2,7 @@

 ; Test that globals assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-NOT: llvm.used
@ -29,11 +29,11 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) {
  ret i8* %p
 }

-; CHECK: .type   g,@object
+; CHECK: .type   .Lg,@object
 ; CHECK: .align  2{{$}}
-; CHECK-NEXT: g:
+; CHECK-NEXT: .Lg:
 ; CHECK-NEXT: .int32 1337{{$}}
-; CHECK-NEXT: .size g, 4{{$}}
+; CHECK-NEXT: .size .Lg, 4{{$}}
@g = private global i32 1337

 ; CHECK-LABEL: ud:
--- a/llvm/test/CodeGen/WebAssembly/globl.ll
+++ b/llvm/test/CodeGen/WebAssembly/globl.ll
@ -1,6 +1,6 @@
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK: .globl foo
--- a/llvm/test/CodeGen/WebAssembly/i32.ll
+++ b/llvm/test/CodeGen/WebAssembly/i32.ll
@ -2,7 +2,7 @@

 ; Test that basic 32-bit integer operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare i32 @llvm.ctlz.i32(i32, i1)
--- a/llvm/test/CodeGen/WebAssembly/i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/i64.ll
@ -2,7 +2,7 @@

 ; Test that basic 64-bit integer operations assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare i64 @llvm.ctlz.i64(i64, i1)
--- a/llvm/test/CodeGen/WebAssembly/ident.ll
+++ b/llvm/test/CodeGen/WebAssembly/ident.ll
@ -2,7 +2,7 @@

 ; Test llvm.ident.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK: .ident "hello world"
--- a/llvm/test/CodeGen/WebAssembly/immediates.ll
+++ b/llvm/test/CodeGen/WebAssembly/immediates.ll
@ -2,7 +2,7 @@

 ; Test that basic immediates assemble as expected.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: zero_i32:
--- a/llvm/test/CodeGen/WebAssembly/inline-asm.ll
+++ b/llvm/test/CodeGen/WebAssembly/inline-asm.ll
@ -2,7 +2,7 @@

 ; Test basic inline assembly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: foo:
--- a/llvm/test/CodeGen/WebAssembly/legalize.ll
+++ b/llvm/test/CodeGen/WebAssembly/legalize.ll
@ -2,7 +2,7 @@

 ; Test various types and operators that need to be legalized.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: shl_i3:
--- a/llvm/test/CodeGen/WebAssembly/load-ext.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-ext.ll
@ -2,7 +2,7 @@

 ; Test that extending loads are assembled properly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: sext_i8_i32:
--- a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
@ -2,7 +2,7 @@

 ; Test that i1 extending loads and truncating stores are assembled properly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: load_u_i1_i32:
--- a/llvm/test/CodeGen/WebAssembly/load.ll
+++ b/llvm/test/CodeGen/WebAssembly/load.ll
@ -2,7 +2,7 @@

 ; Test that basic loads are assembled properly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: ldi32:
--- a/llvm/test/CodeGen/WebAssembly/loop-idiom.ll
+++ b/llvm/test/CodeGen/WebAssembly/loop-idiom.ll
@ -1,6 +1,6 @@
 ; RUN: opt -loop-idiom -S < %s -march=wasm32 | FileCheck %s

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"


--- a/llvm/test/CodeGen/WebAssembly/memory-addr32.ll
+++ b/llvm/test/CodeGen/WebAssembly/memory-addr32.ll
@ -2,7 +2,7 @@

 ; Test that basic memory operations assemble as expected with 32-bit addresses.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare i32 @llvm.wasm.memory.size.i32() nounwind readonly
--- a/llvm/test/CodeGen/WebAssembly/memory-addr64.ll
+++ b/llvm/test/CodeGen/WebAssembly/memory-addr64.ll
@ -2,7 +2,7 @@

 ; Test that basic memory operations assemble as expected with 64-bit addresses.

-target datalayout = "e-p:64:64-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 target triple = "wasm64-unknown-unknown"

 declare i64 @llvm.wasm.memory.size.i64() nounwind readonly
--- a/llvm/test/CodeGen/WebAssembly/offset-folding.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset-folding.ll
@ -2,7 +2,7 @@

 ; Test that constant offsets can be folded into global addresses.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; FIXME: make this 'external' and make sure it still works. WebAssembly
--- a/llvm/test/CodeGen/WebAssembly/offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset.ll
@ -2,7 +2,7 @@

 ; Test constant load and store address offsets.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; With an nuw add, we can fold an offset.
--- a/llvm/test/CodeGen/WebAssembly/phi.ll
+++ b/llvm/test/CodeGen/WebAssembly/phi.ll
@ -2,7 +2,7 @@

 ; Test that phis are lowered.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; Basic phi triangle.
--- a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
@ -2,7 +2,7 @@

 ; Test the register stackifier pass.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; No because of pointer aliasing.
--- a/llvm/test/CodeGen/WebAssembly/return-int32.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-int32.ll
@ -1,6 +1,6 @@
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: return_i32:
--- a/llvm/test/CodeGen/WebAssembly/return-void.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-void.ll
@ -1,6 +1,6 @@
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: return_void:
--- a/llvm/test/CodeGen/WebAssembly/returned.ll
+++ b/llvm/test/CodeGen/WebAssembly/returned.ll
@ -2,7 +2,7 @@

 ; Test that the "returned" attribute is optimized effectively.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: _Z3foov:
--- a/llvm/test/CodeGen/WebAssembly/select.ll
+++ b/llvm/test/CodeGen/WebAssembly/select.ll
@ -3,7 +3,7 @@

 ; Test that wasm select instruction is selected from LLVM select instruction.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: select_i32_bool:
--- a/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
@ -2,7 +2,7 @@

 ; Test zeroext and signext ABI keywords

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: z2s_func:
--- a/llvm/test/CodeGen/WebAssembly/store-results.ll
+++ b/llvm/test/CodeGen/WebAssembly/store-results.ll
@ -3,7 +3,7 @@
 ; Test that the wasm-store-results pass makes users of stored values use the
 ; result of store expressions to reduce get_local/set_local traffic.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: single_block:
--- a/llvm/test/CodeGen/WebAssembly/store-trunc.ll
+++ b/llvm/test/CodeGen/WebAssembly/store-trunc.ll
@ -2,7 +2,7 @@

 ; Test that truncating stores are assembled properly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: trunc_i8_i32:
--- a/llvm/test/CodeGen/WebAssembly/store.ll
+++ b/llvm/test/CodeGen/WebAssembly/store.ll
@ -2,7 +2,7 @@

 ; Test that basic stores are assembled properly.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: sti32:
--- a/llvm/test/CodeGen/WebAssembly/switch.ll
+++ b/llvm/test/CodeGen/WebAssembly/switch.ll
@ -3,7 +3,7 @@
 ; Test switch instructions. Block placement is disabled because it reorders
 ; the blocks in a way that isn't interesting here.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare void @foo0()
--- a/llvm/test/CodeGen/WebAssembly/unreachable.ll
+++ b/llvm/test/CodeGen/WebAssembly/unreachable.ll
@ -4,7 +4,7 @@
 ; Test that LLVM unreachable instruction and trap intrinsic are lowered to
 ; wasm unreachable

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 declare void @llvm.trap()
--- a/llvm/test/CodeGen/WebAssembly/unused-argument.ll
+++ b/llvm/test/CodeGen/WebAssembly/unused-argument.ll
@ -2,7 +2,7 @@

 ; Make sure that argument offsets are correct even if some arguments are unused.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: unused_first:
--- a/llvm/test/CodeGen/WebAssembly/userstack.ll
+++ b/llvm/test/CodeGen/WebAssembly/userstack.ll
@ -2,7 +2,7 @@
 ; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s


-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-LABEL: alloca32:
--- a/llvm/test/CodeGen/WebAssembly/varargs.ll
+++ b/llvm/test/CodeGen/WebAssembly/varargs.ll
@ -2,7 +2,7 @@

 ; Test varargs constructs.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; Test va_start.
--- a/llvm/test/CodeGen/WebAssembly/vtable.ll
+++ b/llvm/test/CodeGen/WebAssembly/vtable.ll
@ -11,7 +11,7 @@
 ;   struct D : public B;
 ; Each with a virtual dtor and method foo.

-target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 %struct.A = type { i32 (...)** }