forked from OSchip/llvm-project
parent
c2efce404e
commit
0c4253fe29
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@ -24,7 +24,7 @@
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using namespace llvm;
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using namespace X86Disassembler;
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/// inheritsFrom - Indicates whether all instructions in one class also belong
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/// to another class.
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///
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@ -36,7 +36,7 @@ static inline bool inheritsFrom(InstructionContext child,
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bool VEX_LIG = false) {
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if (child == parent)
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return true;
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switch (parent) {
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case IC:
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return(inheritsFrom(child, IC_64BIT) ||
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@ -117,17 +117,17 @@ static inline bool inheritsFrom(InstructionContext child,
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/// @param upper - The class that may be preferable
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/// @param lower - The class that may be less preferable
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/// @return - True if upper is to be preferred, false otherwise.
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static inline bool outranks(InstructionContext upper,
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static inline bool outranks(InstructionContext upper,
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InstructionContext lower) {
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assert(upper < IC_max);
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assert(lower < IC_max);
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#define ENUM_ENTRY(n, r, d) r,
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static int ranks[IC_max] = {
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INSTRUCTION_CONTEXTS
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};
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#undef ENUM_ENTRY
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return (ranks[upper] > ranks[lower]);
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}
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@ -178,16 +178,16 @@ void DisassemblerTables::emitOneID(raw_ostream &o,
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o.indent(i * 2) << format("0x%hx", id);
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else
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o.indent(i * 2) << 0;
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if (addComma)
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o << ", ";
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else
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o << " ";
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o << "/* ";
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o << InstructionSpecifiers[id].name;
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o << "*/";
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o << "\n";
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}
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@ -252,19 +252,19 @@ static ModRMDecisionType getDecisionType(ModRMDecision &decision)
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/// to a particular decision type.
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///
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/// @param dt - The decision type.
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/// @return - A pointer to the statically-allocated string (e.g.,
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/// @return - A pointer to the statically-allocated string (e.g.,
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/// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
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static const char* stringForDecisionType(ModRMDecisionType dt)
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{
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#define ENUM_ENTRY(n) case n: return #n;
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switch (dt) {
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default:
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llvm_unreachable("Unknown decision type");
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llvm_unreachable("Unknown decision type");
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MODRMTYPES
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};
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};
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#undef ENUM_ENTRY
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}
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/// stringForModifierType - Returns a statically-allocated string corresponding
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/// to an opcode modifier type.
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///
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@ -281,25 +281,25 @@ static const char* stringForModifierType(ModifierType mt)
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};
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#undef ENUM_ENTRY
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}
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DisassemblerTables::DisassemblerTables() {
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unsigned i;
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for (i = 0; i < array_lengthof(Tables); i++) {
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Tables[i] = new ContextDecision;
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memset(Tables[i], 0, sizeof(ContextDecision));
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}
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HasConflicts = false;
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}
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DisassemblerTables::~DisassemblerTables() {
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unsigned i;
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for (i = 0; i < array_lengthof(Tables); i++)
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delete Tables[i];
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}
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void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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@ -444,11 +444,11 @@ void DisassemblerTables::emitContextDecision(
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o2.indent(i2) << "};" << "\n";
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}
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void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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const {
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o.indent(i * 2) << "static const struct InstructionSpecifier ";
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o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
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i++;
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uint16_t numInstructions = InstructionSpecifiers.size();
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@ -488,7 +488,7 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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i--;
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o.indent(i * 2) << "}," << "\n";
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o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */";
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o << "\n";
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@ -545,7 +545,7 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
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o << "IC_64BIT_REXW_XS";
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else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
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o << "IC_64BIT_REXW_XD";
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else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
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else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
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(index & ATTR_OPSIZE))
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o << "IC_64BIT_REXW_OPSIZE";
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else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
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@ -609,13 +609,13 @@ void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
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void DisassemblerTables::emit(raw_ostream &o) const {
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uint32_t i1 = 0;
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uint32_t i2 = 0;
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std::string s1;
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std::string s2;
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raw_string_ostream o1(s1);
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raw_string_ostream o2(s2);
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emitInstructionInfo(o, i2);
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o << "\n";
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@ -653,10 +653,10 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
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InstructionSpecifiers[uid];
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InstructionSpecifier &previousInfo =
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InstructionSpecifiers[decision.instructionIDs[index]];
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if(newInfo.filtered)
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continue; // filtered instructions get lowest priority
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if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
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newInfo.name == "XCHG32ar" ||
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newInfo.name == "XCHG32ar64" ||
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@ -665,7 +665,7 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
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if (outranks(previousInfo.insnContext, newInfo.insnContext))
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continue;
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if (previousInfo.insnContext == newInfo.insnContext &&
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!previousInfo.filtered) {
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errs() << "Error: Primary decode conflict: ";
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@ -691,16 +691,16 @@ void DisassemblerTables::setTableFields(OpcodeType type,
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bool is32bit,
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bool ignoresVEX_L) {
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unsigned index;
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ContextDecision &decision = *Tables[type];
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for (index = 0; index < IC_max; ++index) {
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if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT))
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continue;
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if (inheritsFrom((InstructionContext)index,
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if (inheritsFrom((InstructionContext)index,
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InstructionSpecifiers[uid].insnContext, ignoresVEX_L))
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setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
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setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
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filter,
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uid,
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opcode);
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