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Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz" 

This reverts commit 18279a54b5 as it is
causing some chromium android test problems.
This commit is contained in:
David Green 2020-08-13 22:40:36 +01:00
parent 3da939686c
commit 0c390c22a5
2 changed files with 14 additions and 20 deletions
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7
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -587,13 +587,6 @@ bool ARMBaseInstrInfo::DefinesPredicate(
const MachineOperand &MO = MI.getOperand(i);
if ((MO.isRegMask() && MO.clobbersPhysReg(ARM::CPSR)) ||
(MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)) {
// Filter out T1 instructions that have a dead CPSR,
// allowing IT blocks to be generated containing T1 instructions
const MCInstrDesc &MCID = MI.getDesc();
if (MCID.TSFlags & ARMII::ThumbArithFlagSetting && MO.isDead())
continue;
Pred.push_back(MO);
Found = true;
}

27
llvm/test/CodeGen/Thumb2/constant-hoisting.ll
View File

@ -37,25 +37,26 @@ define i32 @test_values(i32 %a, i32 %b) minsize optsize {
; CHECK-V7M: mov r2, r0
; CHECK-V7M-NEXT: ldr r0, .LCPI0_0
; CHECK-V7M-NEXT: cmp r2, #50
; CHECK-V7M-NEXT: beq .LBB0_3
; CHECK-V7M-NEXT: beq .LBB0_5
; CHECK-V7M-NEXT: cmp r2, #1
; CHECK-V7M-NEXT: ittt eq
; CHECK-V7M-NEXT: addeq r0, r1
; CHECK-V7M-NEXT: addeq r0, #1
; CHECK-V7M-NEXT: bxeq lr
; CHECK-V7M-NEXT: beq .LBB0_7
; CHECK-V7M-NEXT: cmp r2, #30
; CHECK-V7M-NEXT: ittt eq
; CHECK-V7M-NEXT: addeq r0, r1
; CHECK-V7M-NEXT: addeq r0, #2
; CHECK-V7M-NEXT: bxeq lr
; CHECK-V7M-NEXT: cbnz r2, .LBB0_4
; CHECK-V7M-NEXT: .LBB0_2:
; CHECK-V7M-NEXT: beq .LBB0_8
; CHECK-V7M-NEXT: cbnz r2, .LBB0_6
; CHECK-V7M-NEXT: add r0, r1
; CHECK-V7M-NEXT: bx lr
; CHECK-V7M-NEXT: .LBB0_3:
; CHECK-V7M-NEXT: .LBB0_5:
; CHECK-V7M-NEXT: add r0, r1
; CHECK-V7M-NEXT: adds r0, #4
; CHECK-V7M-NEXT: .LBB0_4:
; CHECK-V7M-NEXT: .LBB0_6:
; CHECK-V7M-NEXT: bx lr
; CHECK-V7M-NEXT: .LBB0_7:
; CHECK-V7M-NEXT: add r0, r1
; CHECK-V7M-NEXT: adds r0, #1
; CHECK-V7M-NEXT: bx lr
; CHECK-V7M-NEXT: .LBB0_8:
; CHECK-V7M-NEXT: add r0, r1
; CHECK-V7M-NEXT: adds r0, #2
; CHECK-V7M-NEXT: bx lr
; CHECK-V7M-NEXT: .p2align 2
; CHECK-V7M-NEXT: .LCPI0_0: