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R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cpp 

Remove handling of select_cc, since it makes no sense to be there. This
now does nothing, but I'll be adding some handling of other target nodes
soon.

llvm-svn: 204743
This commit is contained in:
Matt Arsenault 2014-03-25 18:18:27 +00:00
parent ab88f62614
commit 0c274feedf
3 changed files with 12 additions and 39 deletions
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9
llvm/lib/Target/R600/AMDGPUISelLowering.cpp
View File

@ -1156,3 +1156,12 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(TBUFFER_STORE_FORMAT)
}
}
void AMDGPUTargetLowering::computeMaskedBitsForTargetNode(
const SDValue Op,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
unsigned Depth) const {
KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); // Don't know anything.
}

7
llvm/lib/Target/R600/AMDGPUISelLowering.h
View File

@ -112,9 +112,6 @@ public:
return N;
}
// Functions defined in AMDILISelLowering.cpp
public:
/// \brief Determine which of the bits specified in \p Mask are known to be
/// either zero or one and return them in the \p KnownZero and \p KnownOne
/// bitsets.
@ -122,8 +119,10 @@ public:
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
unsigned Depth = 0) const override;
// Functions defined in AMDILISelLowering.cpp
public:
virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I, unsigned Intrinsic) const;

35
llvm/lib/Target/R600/AMDILISelLowering.cpp
View File

@ -243,41 +243,6 @@ AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const {
// be zero. Op is expected to be a target specific node. Used by DAG
// combiner.
void
AMDGPUTargetLowering::computeMaskedBitsForTargetNode(
const SDValue Op,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
unsigned Depth) const {
APInt KnownZero2;
APInt KnownOne2;
KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); // Don't know anything
switch (Op.getOpcode()) {
default: break;
case ISD::SELECT_CC:
DAG.ComputeMaskedBits(
Op.getOperand(1),
KnownZero,
KnownOne,
Depth + 1
);
DAG.ComputeMaskedBits(
Op.getOperand(0),
KnownZero2,
KnownOne2
);
assert((KnownZero & KnownOne) == 0
&& "Bits known to be one AND zero?");
assert((KnownZero2 & KnownOne2) == 0
&& "Bits known to be one AND zero?");
// Only known if known in both the LHS and RHS
KnownOne &= KnownOne2;
KnownZero &= KnownZero2;
break;
};
}
//===----------------------------------------------------------------------===//
// Other Lowering Hooks
//===----------------------------------------------------------------------===//