Don't recalculate the loop info and loop dominators analyses if they're

preserved.

llvm-svn: 45596
This commit is contained in:
Bill Wendling 2008-01-04 20:54:55 +00:00
parent 2bd541c5ff
commit 0c209430b4
8 changed files with 34 additions and 6 deletions

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@ -38,6 +38,14 @@ namespace llvm {
FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
const std::string &Banner ="");
/// MachineLoopInfo pass - This pass is a loop analysis pass.
///
extern const PassInfo *MachineLoopInfoID;
/// MachineDominators pass - This pass is a machine dominators analysis pass.
///
extern const PassInfo *MachineDominatorsID;
/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is the
/// desired input for some register allocators. This pass is "required" by

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@ -60,6 +60,8 @@ namespace {
void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
AU.addRequired<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
AU.addRequiredID(PHIEliminationID);
AU.addRequiredID(TwoAddressInstructionPassID);

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@ -13,12 +13,17 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class DomTreeNodeBase<MachineBasicBlock>);
TEMPLATE_INSTANTIATION(class DominatorTreeBase<MachineBasicBlock>);
char MachineDominatorTree::ID = 0;
static RegisterPass<MachineDominatorTree>
E("machinedomtree", "MachineDominator Tree Construction", true);
namespace {
char MachineDominatorTree::ID = 0;
RegisterPass<MachineDominatorTree>
E("machinedomtree", "MachineDominator Tree Construction", true);
}
const PassInfo *llvm::MachineDominatorsID = E.getPassInfo();

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@ -16,15 +16,20 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class LoopBase<MachineBasicBlock>);
TEMPLATE_INSTANTIATION(class LoopInfoBase<MachineBasicBlock>);
char MachineLoopInfo::ID = 0;
static RegisterPass<MachineLoopInfo>
X("machine-loops", "Machine Natural Loop Construction", true);
namespace {
char MachineLoopInfo::ID = 0;
RegisterPass<MachineLoopInfo>
X("machine-loops", "Machine Natural Loop Construction", true);
}
const PassInfo *llvm::MachineLoopInfoID = X.getPassInfo();
bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
releaseMemory();

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@ -51,6 +51,8 @@ namespace {
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}

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@ -104,6 +104,8 @@ namespace {
// to coalescing and which analyses coalescing invalidates.
AU.addRequiredTransitive<RegisterCoalescer>();
AU.addRequired<MachineLoopInfo>();
AU.addPreserved<MachineLoopInfo>();
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}

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@ -67,6 +67,8 @@ const PassInfo *llvm::SimpleRegisterCoalescingID = X.getPassInfo();
void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveIntervals>();
AU.addPreserved<MachineLoopInfo>();
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
AU.addPreservedID(TwoAddressInstructionPassID);
AU.addRequired<LiveVariables>();

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@ -69,6 +69,8 @@ const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
MachineFunctionPass::getAnalysisUsage(AU);
}