[DOXYGEN] Improved doxygen comments for x86 intrinsics headers.

Tagged instruction names with <c> INSTR_NAME </c> to display them in typewriter font.

In the past, \c command was used, unfortunately it applied to only one word. 
<c> .. </c> has the same meaning, but applies to all words in between the tags.

llvm-svn: 289249
This commit is contained in:
Ekaterina Romanova 2016-12-09 18:35:50 +00:00
parent 7b00cf4706
commit 0c1c3bbc78
13 changed files with 615 additions and 615 deletions

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@ -35,7 +35,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VAESENC instruction.
/// This intrinsic corresponds to the <c> VAESENC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@ -55,7 +55,7 @@ _mm_aesenc_si128(__m128i __V, __m128i __R)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VAESENCLAST instruction.
/// This intrinsic corresponds to the <c> VAESENCLAST </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@ -75,7 +75,7 @@ _mm_aesenclast_si128(__m128i __V, __m128i __R)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VAESDEC instruction.
/// This intrinsic corresponds to the <c> VAESDEC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@ -95,7 +95,7 @@ _mm_aesdec_si128(__m128i __V, __m128i __R)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VAESDECLAST instruction.
/// This intrinsic corresponds to the <c> VAESDECLAST </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@ -114,7 +114,7 @@ _mm_aesdeclast_si128(__m128i __V, __m128i __R)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VAESIMC instruction.
/// This intrinsic corresponds to the <c> VAESIMC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the expanded key.
@ -136,7 +136,7 @@ _mm_aesimc_si128(__m128i __V)
/// __m128i _mm_aeskeygenassist_si128(__m128i C, const int R);
/// \endcode
///
/// This intrinsic corresponds to the \c AESKEYGENASSIST instruction.
/// This intrinsic corresponds to the <c> AESKEYGENASSIST </c> instruction.
///
/// \param C
/// A 128-bit integer vector that is used to generate the AES encryption key.

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@ -34,7 +34,7 @@
/// __m128i _mm_clmulepi64_si128(__m128i __X, __m128i __Y, const int __I);
/// \endcode
///
/// This intrinsic corresponds to the \c VPCLMULQDQ instruction.
/// This intrinsic corresponds to the <c> VPCLMULQDQ </c> instruction.
///
/// \param __X
/// A 128-bit vector of [2 x i64] containing one of the source operands.

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@ -38,7 +38,7 @@
/// __m128i _mm_extracti_si64(__m128i x, const int len, const int idx);
/// \endcode
///
/// This intrinsic corresponds to the \c EXTRQ instruction.
/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param x
/// The value from which bits are extracted.
@ -63,7 +63,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c EXTRQ instruction.
/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param __x
/// The value from which bits are extracted.
@ -93,7 +93,7 @@ _mm_extract_si64(__m128i __x, __m128i __y)
/// const int idx);
/// \endcode
///
/// This intrinsic corresponds to the \c INSERTQ instruction.
/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param x
/// The destination operand where bits will be inserted. The inserted bits
@ -126,7 +126,7 @@ _mm_extract_si64(__m128i __x, __m128i __y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c INSERTQ instruction.
/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param __x
/// The destination operand where bits will be inserted. The inserted bits
@ -158,7 +158,7 @@ _mm_insert_si64(__m128i __x, __m128i __y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c MOVNTSD instruction.
/// This intrinsic corresponds to the <c> MOVNTSD </c> instruction.
///
/// \param __p
/// The 64-bit memory location used to store the register value.
@ -176,7 +176,7 @@ _mm_stream_sd(double *__p, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c MOVNTSS instruction.
/// This intrinsic corresponds to the <c> MOVNTSS </c> instruction.
///
/// \param __p
/// The 32-bit memory location used to store the register value.

File diff suppressed because it is too large Load Diff

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@ -36,7 +36,7 @@
/// unsigned short _tzcnt_u16(unsigned short a);
/// \endcode
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 16-bit integer whose trailing zeros are to be counted.
@ -53,7 +53,7 @@
/// unsigned int _andn_u32(unsigned int a, unsigned int b);
/// \endcode
///
/// This intrinsic corresponds to the \c ANDN instruction.
/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param a
/// An unsigned integer containing one of the operands.
@ -73,7 +73,7 @@
/// unsigned int _blsi_u32(unsigned int a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSI instruction.
/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param a
/// An unsigned integer whose bits are to be cleared.
@ -91,7 +91,7 @@
/// unsigned int _blsmsk_u32(unsigned int a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSMSK instruction.
/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param a
/// An unsigned integer used to create the mask.
@ -107,7 +107,7 @@
/// unsigned int _blsr_u32(unsigned int a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSR instruction.
/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param a
/// An unsigned integer containing the operand to be cleared.
@ -123,7 +123,7 @@
/// unsigned int _tzcnt_u32(unsigned int a);
/// \endcode
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@ -143,7 +143,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 16-bit integer whose trailing zeros are to be counted.
@ -160,7 +160,7 @@ __tzcnt_u16(unsigned short __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c ANDN instruction.
/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param __X
/// An unsigned integer containing one of the operands.
@ -180,7 +180,7 @@ __andn_u32(unsigned int __X, unsigned int __Y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BEXTR instruction.
/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be extracted.
@ -202,7 +202,7 @@ __bextr_u32(unsigned int __X, unsigned int __Y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BEXTR instruction.
/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be extracted.
@ -225,7 +225,7 @@ _bextr_u32(unsigned int __X, unsigned int __Y, unsigned int __Z)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSI instruction.
/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be cleared.
@ -243,7 +243,7 @@ __blsi_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSMSK instruction.
/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param __X
/// An unsigned integer used to create the mask.
@ -259,7 +259,7 @@ __blsmsk_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSR instruction.
/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param __X
/// An unsigned integer containing the operand to be cleared.
@ -275,7 +275,7 @@ __blsr_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@ -291,7 +291,7 @@ __tzcnt_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@ -314,7 +314,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _andn_u64 (unsigned long long a, unsigned long long b);
/// \endcode
///
/// This intrinsic corresponds to the \c ANDN instruction.
/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer containing one of the operands.
@ -334,7 +334,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsi_u64(unsigned long long a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSI instruction.
/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer whose bits are to be cleared.
@ -352,7 +352,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsmsk_u64(unsigned long long a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSMSK instruction.
/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer used to create the mask.
@ -368,7 +368,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsr_u64(unsigned long long a);
/// \endcode
///
/// This intrinsic corresponds to the \c BLSR instruction.
/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer containing the operand to be cleared.
@ -384,7 +384,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _tzcnt_u64(unsigned long long a);
/// \endcode
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer whose trailing zeros are to be counted.
@ -397,7 +397,7 @@ _mm_tzcnt_32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c ANDN instruction.
/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer containing one of the operands.
@ -417,7 +417,7 @@ __andn_u64 (unsigned long long __X, unsigned long long __Y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BEXTR instruction.
/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be extracted.
@ -439,7 +439,7 @@ __bextr_u64(unsigned long long __X, unsigned long long __Y)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BEXTR instruction.
/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be extracted.
@ -462,7 +462,7 @@ _bextr_u64(unsigned long long __X, unsigned int __Y, unsigned int __Z)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSI instruction.
/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be cleared.
@ -480,7 +480,7 @@ __blsi_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSMSK instruction.
/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer used to create the mask.
@ -496,7 +496,7 @@ __blsmsk_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c BLSR instruction.
/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer containing the operand to be cleared.
@ -512,7 +512,7 @@ __blsr_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose trailing zeros are to be counted.
@ -528,7 +528,7 @@ __tzcnt_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c TZCNT instruction.
/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose trailing zeros are to be counted.

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@ -37,7 +37,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 16-bit half-precision float value.
@ -59,7 +59,7 @@ _cvtsh_ss(unsigned short __a)
/// unsigned short _cvtss_sh(float a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 32-bit single-precision float value to be converted to a 16-bit
@ -85,7 +85,7 @@ _cvtsh_ss(unsigned short __a)
/// __m128i _mm_cvtps_ph(__m128 a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 128-bit vector containing 32-bit float values.
@ -107,7 +107,7 @@ _cvtsh_ss(unsigned short __a)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector containing 16-bit half-precision float values. The lower

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@ -35,7 +35,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c FXSAVE instruction.
/// This intrinsic corresponds to the <c> FXSAVE </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@ -53,7 +53,7 @@ _fxsave(void *__p)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c FXRSTOR instruction.
/// This intrinsic corresponds to the <c> FXRSTOR </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@ -70,7 +70,7 @@ _fxrstor(void *__p)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c FXSAVE64 instruction.
/// This intrinsic corresponds to the <c> FXSAVE64 </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@ -88,7 +88,7 @@ _fxsave64(void *__p)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c FXRSTOR64 instruction.
/// This intrinsic corresponds to the <c> FXRSTOR64 </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory

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@ -78,7 +78,7 @@
/// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 256-bit vector containing 32-bit single-precision float values to be
@ -100,7 +100,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector containing 16-bit half-precision float values to be

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@ -39,7 +39,7 @@ typedef char __v8qi __attribute__((__vector_size__(8)));
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c EMMS instruction.
/// This intrinsic corresponds to the <c> EMMS </c> instruction.
///
static __inline__ void __DEFAULT_FN_ATTRS
_mm_empty(void)
@ -52,7 +52,7 @@ _mm_empty(void)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __i
/// A 32-bit integer value.
@ -69,7 +69,7 @@ _mm_cvtsi32_si64(int __i)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector.
@ -85,7 +85,7 @@ _mm_cvtsi64_si32(__m64 __m)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction.
/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
///
/// \param __i
/// A 64-bit signed integer.
@ -101,7 +101,7 @@ _mm_cvtsi64_m64(long long __i)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction.
/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector.
@ -121,7 +121,7 @@ _mm_cvtm64_si64(__m64 __m)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PACKSSWB instruction.
/// This intrinsic corresponds to the <c> PACKSSWB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
@ -151,7 +151,7 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PACKSSDW instruction.
/// This intrinsic corresponds to the <c> PACKSSDW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
@ -181,7 +181,7 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PACKUSWB instruction.
/// This intrinsic corresponds to the <c> PACKUSWB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
@ -208,7 +208,7 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKHBW instruction.
/// This intrinsic corresponds to the <c> PUNPCKHBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -235,7 +235,7 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKHWD instruction.
/// This intrinsic corresponds to the <c> PUNPCKHWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -258,7 +258,7 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKHDQ instruction.
/// This intrinsic corresponds to the <c> PUNPCKHDQ </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
@ -279,7 +279,7 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKLBW instruction.
/// This intrinsic corresponds to the <c> PUNPCKLBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -306,7 +306,7 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKLWD instruction.
/// This intrinsic corresponds to the <c> PUNPCKLWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -329,7 +329,7 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PUNPCKLDQ instruction.
/// This intrinsic corresponds to the <c> PUNPCKLDQ </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
@ -352,7 +352,7 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDB instruction.
/// This intrinsic corresponds to the <c> PADDB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -373,7 +373,7 @@ _mm_add_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDW instruction.
/// This intrinsic corresponds to the <c> PADDW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -394,7 +394,7 @@ _mm_add_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDD instruction.
/// This intrinsic corresponds to the <c> PADDD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@ -416,7 +416,7 @@ _mm_add_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDSB instruction.
/// This intrinsic corresponds to the <c> PADDSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -439,7 +439,7 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDSW instruction.
/// This intrinsic corresponds to the <c> PADDSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -461,7 +461,7 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDUSB instruction.
/// This intrinsic corresponds to the <c> PADDUSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -483,7 +483,7 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PADDUSW instruction.
/// This intrinsic corresponds to the <c> PADDUSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -504,7 +504,7 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBB instruction.
/// This intrinsic corresponds to the <c> PSUBB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@ -525,7 +525,7 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBW instruction.
/// This intrinsic corresponds to the <c> PSUBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@ -546,7 +546,7 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBD instruction.
/// This intrinsic corresponds to the <c> PSUBD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32] containing the minuends.
@ -569,7 +569,7 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBSB instruction.
/// This intrinsic corresponds to the <c> PSUBSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@ -592,7 +592,7 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBSW instruction.
/// This intrinsic corresponds to the <c> PSUBSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@ -615,7 +615,7 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBUSB instruction.
/// This intrinsic corresponds to the <c> PSUBUSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@ -638,7 +638,7 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSUBUSW instruction.
/// This intrinsic corresponds to the <c> PSUBUSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@ -663,7 +663,7 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PMADDWD instruction.
/// This intrinsic corresponds to the <c> PMADDWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -684,7 +684,7 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PMULHW instruction.
/// This intrinsic corresponds to the <c> PMULHW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -705,7 +705,7 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PMULLW instruction.
/// This intrinsic corresponds to the <c> PMULLW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -727,7 +727,7 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLW instruction.
/// This intrinsic corresponds to the <c> PSLLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -749,7 +749,7 @@ _mm_sll_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLW instruction.
/// This intrinsic corresponds to the <c> PSLLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -772,7 +772,7 @@ _mm_slli_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLD instruction.
/// This intrinsic corresponds to the <c> PSLLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -794,7 +794,7 @@ _mm_sll_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLD instruction.
/// This intrinsic corresponds to the <c> PSLLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -815,7 +815,7 @@ _mm_slli_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLQ instruction.
/// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@ -835,7 +835,7 @@ _mm_sll_si64(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSLLQ instruction.
/// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@ -858,7 +858,7 @@ _mm_slli_si64(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRAW instruction.
/// This intrinsic corresponds to the <c> PSRAW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -880,7 +880,7 @@ _mm_sra_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRAW instruction.
/// This intrinsic corresponds to the <c> PSRAW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -903,7 +903,7 @@ _mm_srai_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRAD instruction.
/// This intrinsic corresponds to the <c> PSRAD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -925,7 +925,7 @@ _mm_sra_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRAD instruction.
/// This intrinsic corresponds to the <c> PSRAD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -947,7 +947,7 @@ _mm_srai_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLW instruction.
/// This intrinsic corresponds to the <c> PSRLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -968,7 +968,7 @@ _mm_srl_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLW instruction.
/// This intrinsic corresponds to the <c> PSRLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@ -990,7 +990,7 @@ _mm_srli_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLD instruction.
/// This intrinsic corresponds to the <c> PSRLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -1011,7 +1011,7 @@ _mm_srl_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLD instruction.
/// This intrinsic corresponds to the <c> PSRLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@ -1031,7 +1031,7 @@ _mm_srli_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLQ instruction.
/// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@ -1050,7 +1050,7 @@ _mm_srl_si64(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PSRLQ instruction.
/// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@ -1067,7 +1067,7 @@ _mm_srli_si64(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PAND instruction.
/// This intrinsic corresponds to the <c> PAND </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@ -1087,7 +1087,7 @@ _mm_and_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PANDN instruction.
/// This intrinsic corresponds to the <c> PANDN </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector. The one's complement of this parameter is used
@ -1106,7 +1106,7 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c POR instruction.
/// This intrinsic corresponds to the <c> POR </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@ -1124,7 +1124,7 @@ _mm_or_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PXOR instruction.
/// This intrinsic corresponds to the <c> PXOR </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@ -1145,7 +1145,7 @@ _mm_xor_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPEQB instruction.
/// This intrinsic corresponds to the <c> PCMPEQB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -1166,7 +1166,7 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPEQW instruction.
/// This intrinsic corresponds to the <c> PCMPEQW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -1187,7 +1187,7 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPEQD instruction.
/// This intrinsic corresponds to the <c> PCMPEQD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@ -1208,7 +1208,7 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPGTB instruction.
/// This intrinsic corresponds to the <c> PCMPGTB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@ -1229,7 +1229,7 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPGTW instruction.
/// This intrinsic corresponds to the <c> PCMPGTW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@ -1250,7 +1250,7 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c PCMPGTD instruction.
/// This intrinsic corresponds to the <c> PCMPGTD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@ -1268,7 +1268,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the the \c VXORPS / XORPS instruction.
/// This intrinsic corresponds to the the <c> VXORPS / XORPS </c> instruction.
///
/// \returns An initialized 64-bit integer vector with all elements set to zero.
static __inline__ __m64 __DEFAULT_FN_ATTRS
@ -1360,7 +1360,7 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VPSHUFD / PSHUFD instruction.
/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
///
/// \param __i
/// A 32-bit integer value used to initialize each vector element of the
@ -1378,7 +1378,7 @@ _mm_set1_pi32(int __i)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VPSHUFLW / PSHUFLW instruction.
/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
///
/// \param __w
/// A 16-bit integer value used to initialize each vector element of the
@ -1395,8 +1395,8 @@ _mm_set1_pi16(short __w)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VPUNPCKLBW + VPSHUFLW / \c PUNPCKLBW +
/// PSHUFLW instruction.
/// This intrinsic corresponds to the <c> VPUNPCKLBW + VPSHUFLW / PUNPCKLBW +
/// PSHUFLW </c> instruction.
///
/// \param __b
/// An 8-bit integer value used to initialize each vector element of the

View File

@ -37,7 +37,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VLDDQU instruction.
/// This intrinsic corresponds to the <c> VLDDQU </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit integer vector containing integer values.
@ -53,7 +53,7 @@ _mm_lddqu_si128(__m128i const *__p)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VADDSUBPS instruction.
/// This intrinsic corresponds to the <c> VADDSUBPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the left source operand.
@ -72,7 +72,7 @@ _mm_addsub_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VHADDPS instruction.
/// This intrinsic corresponds to the <c> VHADDPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@ -95,7 +95,7 @@ _mm_hadd_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VHSUBPS instruction.
/// This intrinsic corresponds to the <c> VHSUBPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@ -123,7 +123,7 @@ _mm_hsub_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVSHDUP instruction.
/// This intrinsic corresponds to the <c> VMOVSHDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@ -145,7 +145,7 @@ _mm_movehdup_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVSLDUP instruction.
/// This intrinsic corresponds to the <c> VMOVSLDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@ -162,7 +162,7 @@ _mm_moveldup_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VADDSUBPD instruction.
/// This intrinsic corresponds to the <c> VADDSUBPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the left source operand.
@ -181,7 +181,7 @@ _mm_addsub_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VHADDPD instruction.
/// This intrinsic corresponds to the <c> VHADDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@ -204,7 +204,7 @@ _mm_hadd_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VHSUBPD instruction.
/// This intrinsic corresponds to the <c> VHSUBPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@ -231,7 +231,7 @@ _mm_hsub_pd(__m128d __a, __m128d __b)
/// __m128d _mm_loaddup_pd(double const * dp);
/// \endcode
///
/// This intrinsic corresponds to the \c VMOVDDUP instruction.
/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
///
/// \param dp
/// A pointer to a double-precision value to be moved and duplicated.
@ -245,7 +245,7 @@ _mm_hsub_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c VMOVDDUP instruction.
/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. Bits [63:0] are written to bits
@ -272,7 +272,7 @@ _mm_movedup_pd(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c MONITOR instruction.
/// This intrinsic corresponds to the <c> MONITOR </c> instruction.
///
/// \param __p
/// The memory range to be monitored. The size of the range is determined by
@ -293,7 +293,7 @@ _mm_monitor(void const *__p, unsigned __extensions, unsigned __hints)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c MWAIT instruction.
/// This intrinsic corresponds to the <c> MWAIT </c> instruction.
///
/// \param __extensions
/// Optional extensions for the monitoring state, which may vary by

View File

@ -31,7 +31,7 @@
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c POPCNT instruction.
/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// An unsigned 32-bit integer operand.
@ -47,7 +47,7 @@ _mm_popcnt_u32(unsigned int __A)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c POPCNT instruction.
/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// A signed 32-bit integer operand.
@ -64,7 +64,7 @@ _popcnt32(int __A)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c POPCNT instruction.
/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// An unsigned 64-bit integer operand.
@ -80,7 +80,7 @@ _mm_popcnt_u64(unsigned long long __A)
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the \c POPCNT instruction.
/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// A signed 64-bit integer operand.

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