forked from OSchip/llvm-project
[x86] add test for 256-bit andn (PR37749); NFC
llvm-svn: 342595
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@ -335,6 +335,35 @@ define <8 x i32> @and_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z
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ret <8 x i32> %t
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}
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define <8 x i32> @andn_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) {
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; AVX1-LABEL: andn_disguised_i8_elts:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
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; AVX1-NEXT: vpaddd %xmm3, %xmm4, %xmm3
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; AVX1-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
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; AVX1-NEXT: vandnps {{.*}}(%rip), %ymm0, %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
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; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1
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; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; INT256-LABEL: andn_disguised_i8_elts:
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; INT256: # %bb.0:
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; INT256-NEXT: vpaddd %ymm0, %ymm1, %ymm0
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; INT256-NEXT: vpandn {{.*}}(%rip), %ymm0, %ymm0
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; INT256-NEXT: vpaddd %ymm2, %ymm0, %ymm0
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; INT256-NEXT: retq
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%add = add <8 x i32> %y, %x
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%neg = and <8 x i32> %add, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
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%and = xor <8 x i32> %neg, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
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%add1 = add <8 x i32> %and, %z
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ret <8 x i32> %add1
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}
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define <8 x i32> @or_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) {
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; AVX1-LABEL: or_disguised_i8_elts:
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; AVX1: # %bb.0:
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