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[SVE] Remove calls to getBitWidth from ARM 

Reviewers: efriedma

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77904
This commit is contained in:
Christopher Tetreault 2020-04-14 10:34:35 -07:00
parent 664fda72ea
commit 0badd8f613
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/Target/ARM/ARMISelLowering.cpp
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@ -17584,7 +17584,7 @@ bool ARMTargetLowering::canCombineStoreAndExtract(Type *VectorTy, Value *Idx,
return false;
assert(VectorTy->isVectorTy() && "VectorTy is not a vector type");
unsigned BitWidth = cast<VectorType>(VectorTy)->getBitWidth();
unsigned BitWidth = VectorTy->getPrimitiveSizeInBits().getFixedSize();
// We can do a store + vector extract on any vector that fits perfectly in a D
// or Q register.
if (BitWidth == 64 || BitWidth == 128) {
@ -18081,11 +18081,11 @@ static bool isHomogeneousAggregate(Type *Ty, HABaseType &Base,
case HA_DOUBLE:
return false;
case HA_VECT64:
return VT->getBitWidth() == 64;
return VT->getPrimitiveSizeInBits().getFixedSize() == 64;
case HA_VECT128:
return VT->getBitWidth() == 128;
return VT->getPrimitiveSizeInBits().getFixedSize() == 128;
case HA_UNKNOWN:
switch (VT->getBitWidth()) {
switch (VT->getPrimitiveSizeInBits().getFixedSize()) {
case 64:
Base = HA_VECT64;
return true;