[builtins] Use single line C++/C99 comment style

Use the uniform single line C++/99 style for code comments.

This is part of the cleanup proposed in "[RFC] compiler-rt builtins
cleanup and refactoring".

Differential Revision: https://reviews.llvm.org/D60352

llvm-svn: 359411

compiler-rt/lib/builtins/absvdi2.c

@@ -1,21 +1,20 @@
-/*===-- absvdi2.c - Implement __absvdi2 -----------------------------------===
+//===-- absvdi2.c - Implement __absvdi2 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __absvdi2 for the compiler_rt library.
+// This file implements __absvdi2 for the compiler_rt library.
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: absolute value */
+// Returns: absolute value
 
-/* Effects: aborts if abs(x) < 0 */
+// Effects: aborts if abs(x) < 0
 
 COMPILER_RT_ABI di_int __absvdi2(di_int a) {
   const int N = (int)(sizeof(di_int) * CHAR_BIT);

compiler-rt/lib/builtins/absvsi2.c

@@ -1,21 +1,20 @@
-/* ===-- absvsi2.c - Implement __absvsi2 -----------------------------------===
+//===-- absvsi2.c - Implement __absvsi2 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __absvsi2 for the compiler_rt library.
+// This file implements __absvsi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: absolute value */
+// Returns: absolute value
 
-/* Effects: aborts if abs(x) < 0 */
+// Effects: aborts if abs(x) < 0
 
 COMPILER_RT_ABI si_int __absvsi2(si_int a) {
   const int N = (int)(sizeof(si_int) * CHAR_BIT);

compiler-rt/lib/builtins/absvti2.c

@@ -1,23 +1,22 @@
-/* ===-- absvti2.c - Implement __absvdi2 -----------------------------------===
+//===-- absvti2.c - Implement __absvdi2 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __absvti2 for the compiler_rt library.
+// This file implements __absvti2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: absolute value */
+// Returns: absolute value
 
-/* Effects: aborts if abs(x) < 0 */
+// Effects: aborts if abs(x) < 0
 
 COMPILER_RT_ABI ti_int __absvti2(ti_int a) {
   const int N = (int)(sizeof(ti_int) * CHAR_BIT);
@@ -27,4 +26,4 @@ COMPILER_RT_ABI ti_int __absvti2(ti_int a) {
   return (a ^ s) - s;
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/addvdi3.c

@@ -1,21 +1,20 @@
-/* ===-- addvdi3.c - Implement __addvdi3 -----------------------------------===
+//===-- addvdi3.c - Implement __addvdi3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __addvdi3 for the compiler_rt library.
+// This file implements __addvdi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a + b */
+// Returns: a + b
 
-/* Effects: aborts if a + b overflows */
+// Effects: aborts if a + b overflows
 
 COMPILER_RT_ABI di_int __addvdi3(di_int a, di_int b) {
   di_int s = (du_int)a + (du_int)b;

compiler-rt/lib/builtins/addvsi3.c

@@ -1,21 +1,20 @@
-/* ===-- addvsi3.c - Implement __addvsi3 -----------------------------------===
+//===-- addvsi3.c - Implement __addvsi3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __addvsi3 for the compiler_rt library.
+// This file implements __addvsi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a + b */
+// Returns: a + b
 
-/* Effects: aborts if a + b overflows */
+// Effects: aborts if a + b overflows
 
 COMPILER_RT_ABI si_int __addvsi3(si_int a, si_int b) {
   si_int s = (su_int)a + (su_int)b;

compiler-rt/lib/builtins/addvti3.c

@@ -1,23 +1,22 @@
-/* ===-- addvti3.c - Implement __addvti3 -----------------------------------===
+//===-- addvti3.c - Implement __addvti3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __addvti3 for the compiler_rt library.
+// This file implements __addvti3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: a + b */
+// Returns: a + b
 
-/* Effects: aborts if a + b overflows */
+// Effects: aborts if a + b overflows
 
 COMPILER_RT_ABI ti_int __addvti3(ti_int a, ti_int b) {
   ti_int s = (tu_int)a + (tu_int)b;
@@ -31,4 +30,4 @@ COMPILER_RT_ABI ti_int __addvti3(ti_int a, ti_int b) {
   return s;
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/apple_versioning.c

@@ -1,11 +1,10 @@
-/* ===-- apple_versioning.c - Adds versioning symbols for ld ---------------===
+//===-- apple_versioning.c - Adds versioning symbols for ld ---------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #if __APPLE__
 #include <Availability.h>
@@ -36,9 +35,8 @@
   __attribute__((visibility("default"))) const char sym##_tmp6 = 0;
 #endif
 
-/* Symbols in libSystem.dylib in 10.6 and later,
+// Symbols in libSystem.dylib in 10.6 and later,
- *  but are in libgcc_s.dylib in earlier versions
+//  but are in libgcc_s.dylib in earlier versions
- */
 
 NOT_HERE_BEFORE_10_6(__absvdi2)
 NOT_HERE_BEFORE_10_6(__absvsi2)
@@ -146,7 +144,7 @@ NOT_HERE_BEFORE_10_6(__gcc_qdiv)
 NOT_HERE_BEFORE_10_6(__gcc_qmul)
 NOT_HERE_BEFORE_10_6(__gcc_qsub)
 NOT_HERE_BEFORE_10_6(__trampoline_setup)
-#endif /* __ppc__ */
+#endif // __ppc__
 
 NOT_HERE_IN_10_8_AND_EARLIER(__atomic_compare_exchange)
 NOT_HERE_IN_10_8_AND_EARLIER(__atomic_compare_exchange_1)
@@ -334,8 +332,8 @@ NOT_HERE_UNTIL_AFTER_4_3(__divmodsi4)
 NOT_HERE_UNTIL_AFTER_4_3(__udivmodsi4)
 #endif // __arm__ && __DYNAMIC__
 
-#else /* !__APPLE__ */
+#else // !__APPLE__
 
 extern int avoid_empty_file;
 
-#endif /* !__APPLE__*/
+#endif // !__APPLE__

compiler-rt/lib/builtins/arm/adddf3vfp.S

@@ -8,12 +8,11 @@
 
 #include "../assembly.h"
 
-//
 // double __adddf3vfp(double a, double b) { return a + b; }
 //
 // Adds two double precision floating point numbers using the Darwin
 // calling convention where double arguments are passsed in GPR pairs
-//
+
 	.syntax unified
 	.p2align 2
 DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
@@ -22,7 +21,7 @@ DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
 #else
 	vmov	d6, r0, r1		// move first param from r0/r1 pair into d6
 	vmov	d7, r2, r3		// move second param from r2/r3 pair into d7
-	vadd.f64 d6, d6, d7		
+	vadd.f64 d6, d6, d7
 	vmov	r0, r1, d6		// move result back to r0/r1 pair
 #endif
 	bx	lr

compiler-rt/lib/builtins/arm/addsf3.S

@@ -1,16 +1,16 @@
-/*===-- addsf3.S - Adds two single precision floating pointer numbers-----===//
+//===-- addsf3.S - Adds two single precision floating pointer numbers-----===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __addsf3 (single precision floating pointer number
+// This file implements the __addsf3 (single precision floating pointer number
- * addition with the IEEE-754 default rounding (to nearest, ties to even)
+// addition with the IEEE-754 default rounding (to nearest, ties to even)
- * function for the ARM Thumb1 ISA.
+// function for the ARM Thumb1 ISA.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 #define significandBits 23
@@ -28,9 +28,9 @@ DEFINE_COMPILERRT_THUMB_FUNCTION(__addsf3)
   // Get the absolute value of a and b.
   lsls r2, r0, #1
   lsls r3, r1, #1
-  lsrs r2, r2, #1  /* aAbs */
+  lsrs r2, r2, #1  // aAbs
   beq  LOCAL_LABEL(a_zero_nan_inf)
-  lsrs r3, r3, #1  /* bAbs */
+  lsrs r3, r3, #1  // bAbs
   beq  LOCAL_LABEL(zero_nan_inf)
 
   // Detect if a or b is infinity or Nan.
@@ -54,9 +54,9 @@ LOCAL_LABEL(no_swap):
 
   // Get the significands and shift them to give us round, guard and sticky.
   lsls r4, r0, #(typeWidth - significandBits)
-  lsrs r4, r4, #(typeWidth - significandBits - 3) /* aSignificand << 3 */
+  lsrs r4, r4, #(typeWidth - significandBits - 3) // aSignificand << 3
   lsls r5, r1, #(typeWidth - significandBits)
-  lsrs r5, r5, #(typeWidth - significandBits - 3) /* bSignificand << 3 */
+  lsrs r5, r5, #(typeWidth - significandBits - 3) // bSignificand << 3
 
   // Get the implicitBit.
   movs r6, #1
@@ -198,7 +198,7 @@ LOCAL_LABEL(do_substraction):
   beq 1f
   movs r7, #1
 1:
-  lsrs r4, r6 /* aSignificand >> shift */
+  lsrs r4, r6 // aSignificand >> shift
   orrs r4, r7
   b LOCAL_LABEL(form_result)
 

compiler-rt/lib/builtins/arm/aeabi_div0.c

@@ -1,33 +1,30 @@
-/* ===-- aeabi_div0.c - ARM Runtime ABI support routines for compiler-rt ---===
+//===-- aeabi_div0.c - ARM Runtime ABI support routines for compiler-rt ---===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the division by zero helper routines as specified by the
+// This file implements the division by zero helper routines as specified by the
- * Run-time ABI for the ARM Architecture.
+// Run-time ABI for the ARM Architecture.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
-/*
+// RTABI 4.3.2 - Division by zero
- * RTABI 4.3.2 - Division by zero
+//
- *
+// The *div0 functions:
- * The *div0 functions:
+// - Return the value passed to them as a parameter
- * - Return the value passed to them as a parameter
+// - Or, return a fixed value defined by the execution environment (such as 0)
- * - Or, return a fixed value defined by the execution environment (such as 0)
+// - Or, raise a signal (often SIGFPE) or throw an exception, and do not return
- * - Or, raise a signal (often SIGFPE) or throw an exception, and do not return
+//
- *
+// An application may provide its own implementations of the *div0 functions to
- * An application may provide its own implementations of the *div0 functions to
+// for a particular behaviour from the *div and *divmod functions called out of
- * for a particular behaviour from the *div and *divmod functions called out of
+// line.
- * line.
- */
 
 #include "../int_lib.h"
 
-/* provide an unused declaration to pacify pendantic compilation */
+// provide an unused declaration to pacify pendantic compilation
 extern unsigned char declaration;
 
 #if defined(__ARM_EABI__)

compiler-rt/lib/builtins/arm/clzdi2.S

@@ -1,15 +1,15 @@
-/* ===-- clzdi2.c - Implement __clzdi2 -------------------------------------===
+//===-- clzdi2.c - Implement __clzdi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements count leading zeros for 64bit arguments.
+// This file implements count leading zeros for 64bit arguments.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
+
 #include "../assembly.h"
 
 	.syntax unified
@@ -34,14 +34,12 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2)
 #endif
 	JMP(lr)
 #else
-	/* Assumption: n != 0 */
+	// Assumption: n != 0
 
-	/*
+	// r0: n
-	 * r0: n
+	// r1: upper half of n, overwritten after check
-	 * r1: upper half of n, overwritten after check
+	// r1: count of leading zeros in n + 1
-	 * r1: count of leading zeros in n + 1
+	// r2: scratch register for shifted r0
-	 * r2: scratch register for shifted r0
-	 */
 #ifdef __ARMEB__
 	cmp	r0, 0
 	moveq	r0, r1
@@ -52,14 +50,12 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2)
 	movne	r1, 1
 	moveq	r1, 33
 
-	/*
+	// Basic block:
-	 * Basic block:
+	// if ((r0 >> SHIFT) == 0)
-	 * if ((r0 >> SHIFT) == 0)
+	//   r1 += SHIFT;
-	 *   r1 += SHIFT;
+	// else
-	 * else
+	//   r0 >>= SHIFT;
-	 *   r0 >>= SHIFT;
+	// for descending powers of two as SHIFT.
-	 * for descending powers of two as SHIFT.
-	 */
 #define BLOCK(shift) \
 	lsrs	r2, r0, shift; \
 	movne	r0, r2; \
@@ -70,18 +66,16 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2)
 	BLOCK(4)
 	BLOCK(2)
 
-	/*
+	// The basic block invariants at this point are (r0 >> 2) == 0 and
-	 * The basic block invariants at this point are (r0 >> 2) == 0 and
+	// r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
-	 * r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
+	//
-	 *
+	// r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)
-	 * r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)
+	// ---+----------------+----------------+------------+--------------
-	 * ---+----------------+----------------+------------+--------------
+	// 1  | 1              | 0              | 0          | 1
-	 * 1  | 1              | 0              | 0          | 1
+	// 2  | 0              | 1              | -1         | 0
-	 * 2  | 0              | 1              | -1         | 0
+	// 3  | 0              | 1              | -1         | 0
-	 * 3  | 0              | 1              | -1         | 0
+	//
-	 *
+	// The r1's initial value of 1 compensates for the 1 here.
-	 * The r1's initial value of 1 compensates for the 1 here.
-	 */
 	sub	r0, r1, r0, lsr #1
 
 	JMP(lr)

compiler-rt/lib/builtins/arm/clzsi2.S

@@ -1,15 +1,15 @@
-/* ===-- clzsi2.c - Implement __clzsi2 -------------------------------------===
+//===-- clzsi2.c - Implement __clzsi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements count leading zeros for 32bit arguments.
+// This file implements count leading zeros for 32bit arguments.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
+
 #include "../assembly.h"
 
 	.syntax unified
@@ -22,23 +22,19 @@ DEFINE_COMPILERRT_FUNCTION(__clzsi2)
 	clz	r0, r0
 	JMP(lr)
 #else
-	/* Assumption: n != 0 */
+	// Assumption: n != 0
 
-	/*
+	// r0: n
-	 * r0: n
+	// r1: count of leading zeros in n + 1
-	 * r1: count of leading zeros in n + 1
+	// r2: scratch register for shifted r0
-	 * r2: scratch register for shifted r0
-	 */
 	mov	r1, 1
 
-	/*
+	// Basic block:
-	 * Basic block:
+	// if ((r0 >> SHIFT) == 0)
-	 * if ((r0 >> SHIFT) == 0)
+	//   r1 += SHIFT;
-	 *   r1 += SHIFT;
+	// else
-	 * else
+	//   r0 >>= SHIFT;
-	 *   r0 >>= SHIFT;
+	// for descending powers of two as SHIFT.
-	 * for descending powers of two as SHIFT.
-	 */
 
 #define BLOCK(shift) \
 	lsrs	r2, r0, shift; \
@@ -50,18 +46,16 @@ DEFINE_COMPILERRT_FUNCTION(__clzsi2)
 	BLOCK(4)
 	BLOCK(2)
 
-	/*
+	// The basic block invariants at this point are (r0 >> 2) == 0 and
-	 * The basic block invariants at this point are (r0 >> 2) == 0 and
+	// r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
-	 * r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
+	//
-	 *
+	// r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)
-	 * r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)
+	// ---+----------------+----------------+------------+--------------
-	 * ---+----------------+----------------+------------+--------------
+	// 1  | 1              | 0              | 0          | 1
-	 * 1  | 1              | 0              | 0          | 1
+	// 2  | 0              | 1              | -1         | 0
-	 * 2  | 0              | 1              | -1         | 0
+	// 3  | 0              | 1              | -1         | 0
-	 * 3  | 0              | 1              | -1         | 0
+	//
-	 *
+	// The r1's initial value of 1 compensates for the 1 here.
-	 * The r1's initial value of 1 compensates for the 1 here.
-	 */
 	sub	r0, r1, r0, lsr #1
 
 	JMP(lr)

compiler-rt/lib/builtins/arm/divmodsi4.S

@@ -1,16 +1,16 @@
-/*===-- divmodsi4.S - 32-bit signed integer divide and modulus ------------===//
+//===-- divmodsi4.S - 32-bit signed integer divide and modulus ------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __divmodsi4 (32-bit signed integer divide and
+// This file implements the __divmodsi4 (32-bit signed integer divide and
- * modulus) function for the ARM architecture.  A naive digit-by-digit
+// modulus) function for the ARM architecture.  A naive digit-by-digit
- * computation is employed for simplicity.
+// computation is employed for simplicity.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 

compiler-rt/lib/builtins/arm/divsi3.S

@@ -1,15 +1,15 @@
-/*===-- divsi3.S - 32-bit signed integer divide ---------------------------===//
+//===-- divsi3.S - 32-bit signed integer divide ---------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __divsi3 (32-bit signed integer divide) function
+// This file implements the __divsi3 (32-bit signed integer divide) function
- * for the ARM architecture as a wrapper around the unsigned routine.
+// for the ARM architecture as a wrapper around the unsigned routine.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 

compiler-rt/lib/builtins/arm/eqdf2vfp.S

@@ -8,13 +8,12 @@
 
 #include "../assembly.h"
 
-//
 // extern int __eqdf2vfp(double a, double b);
 //
 // Returns one iff a == b and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
-//
+
 	.syntax unified
 	.p2align 2
 DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
@@ -23,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
 #else
 	vmov	d6, r0, r1	// load r0/r1 pair in double register
 	vmov	d7, r2, r3	// load r2/r3 pair in double register
-	vcmp.f64 d6, d7		
+	vcmp.f64 d6, d7
 #endif
 	vmrs	apsr_nzcv, fpscr
 	ITE(eq)

compiler-rt/lib/builtins/arm/eqsf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __eqsf2vfp(float a, float b);
 //
 // Returns one iff a == b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/extendsfdf2vfp.S

@@ -12,7 +12,7 @@
 // extern double __extendsfdf2vfp(float a);
 //
 // Converts single precision float to double precision result.
-// Uses Darwin calling convention where a single precision parameter is 
+// Uses Darwin calling convention where a single precision parameter is
 // passed in a GPR and a double precision result is returned in R0/R1 pair.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/fixdfsivfp.S

@@ -12,7 +12,7 @@
 // extern int __fixdfsivfp(double a);
 //
 // Converts double precision float to a 32-bit int rounding towards zero.
-// Uses Darwin calling convention where a double precision parameter is 
+// Uses Darwin calling convention where a double precision parameter is
 // passed in GPR register pair.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/fixsfsivfp.S

@@ -12,7 +12,7 @@
 // extern int __fixsfsivfp(float a);
 //
 // Converts single precision float to a 32-bit int rounding towards zero.
-// Uses Darwin calling convention where a single precision parameter is 
+// Uses Darwin calling convention where a single precision parameter is
 // passed in a GPR..
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/fixunsdfsivfp.S

@@ -11,9 +11,9 @@
 //
 // extern unsigned int __fixunsdfsivfp(double a);
 //
-// Converts double precision float to a 32-bit unsigned int rounding towards 
+// Converts double precision float to a 32-bit unsigned int rounding towards
 // zero. All negative values become zero.
-// Uses Darwin calling convention where a double precision parameter is 
+// Uses Darwin calling convention where a double precision parameter is
 // passed in GPR register pair.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/fixunssfsivfp.S

@@ -11,9 +11,9 @@
 //
 // extern unsigned int __fixunssfsivfp(float a);
 //
-// Converts single precision float to a 32-bit unsigned int rounding towards 
+// Converts single precision float to a 32-bit unsigned int rounding towards
 // zero. All negative values become zero.
-// Uses Darwin calling convention where a single precision parameter is 
+// Uses Darwin calling convention where a single precision parameter is
 // passed in a GPR..
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/floatsidfvfp.S

@@ -12,7 +12,7 @@
 // extern double __floatsidfvfp(int a);
 //
 // Converts a 32-bit int to a double precision float.
-// Uses Darwin calling convention where a double precision result is 
+// Uses Darwin calling convention where a double precision result is
 // return in GPR register pair.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/floatsisfvfp.S

@@ -12,7 +12,7 @@
 // extern float __floatsisfvfp(int a);
 //
 // Converts single precision float to a 32-bit int rounding towards zero.
-// Uses Darwin calling convention where a single precision result is 
+// Uses Darwin calling convention where a single precision result is
 // return in a GPR..
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/floatunssidfvfp.S

@@ -12,7 +12,7 @@
 // extern double __floatunssidfvfp(unsigned int a);
 //
 // Converts a 32-bit int to a double precision float.
-// Uses Darwin calling convention where a double precision result is 
+// Uses Darwin calling convention where a double precision result is
 // return in GPR register pair.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/floatunssisfvfp.S

@@ -12,7 +12,7 @@
 // extern float __floatunssisfvfp(unsigned int a);
 //
 // Converts single precision float to a 32-bit int rounding towards zero.
-// Uses Darwin calling convention where a single precision result is 
+// Uses Darwin calling convention where a single precision result is
 // return in a GPR..
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/gedf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __gedf2vfp(double a, double b);
 //
 // Returns one iff a >= b and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/gesf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __gesf2vfp(float a, float b);
 //
 // Returns one iff a >= b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/gtdf2vfp.S

@@ -12,7 +12,7 @@
 // extern double __gtdf2vfp(double a, double b);
 //
 // Returns one iff a > b and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/gtsf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __gtsf2vfp(float a, float b);
 //
 // Returns one iff a > b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/ledf2vfp.S

@@ -12,7 +12,7 @@
 // extern double __ledf2vfp(double a, double b);
 //
 // Returns one iff a <= b and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/lesf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __lesf2vfp(float a, float b);
 //
 // Returns one iff a <= b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/ltdf2vfp.S

@@ -12,7 +12,7 @@
 // extern double __ltdf2vfp(double a, double b);
 //
 // Returns one iff a < b and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/ltsf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __ltsf2vfp(float a, float b);
 //
 // Returns one iff a < b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/modsi3.S

@@ -1,15 +1,15 @@
-/*===-- modsi3.S - 32-bit signed integer modulus --------------------------===//
+//===-- modsi3.S - 32-bit signed integer modulus --------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __modsi3 (32-bit signed integer modulus) function
+// This file implements the __modsi3 (32-bit signed integer modulus) function
- * for the ARM architecture as a wrapper around the unsigned routine.
+// for the ARM architecture as a wrapper around the unsigned routine.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 

compiler-rt/lib/builtins/arm/nedf2vfp.S

@@ -8,13 +8,12 @@
 
 #include "../assembly.h"
 
-//
 // extern double __nedf2vfp(double a, double b);
 //
 // Returns zero if a and b are unequal and neither is NaN.
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
-//
+
 	.syntax unified
 	.p2align 2
 DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
@@ -23,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
 #else
 	vmov 	d6, r0, r1	// load r0/r1 pair in double register
 	vmov 	d7, r2, r3	// load r2/r3 pair in double register
-	vcmp.f64 d6, d7		
+	vcmp.f64 d6, d7
 #endif
 	vmrs	apsr_nzcv, fpscr
 	ITE(ne)

compiler-rt/lib/builtins/arm/negdf2vfp.S

@@ -11,7 +11,7 @@
 //
 // extern double __negdf2vfp(double a, double b);
 //
-// Returns the negation a double precision floating point numbers using the 
+// Returns the negation a double precision floating point numbers using the
 // Darwin calling convention where double arguments are passsed in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/negsf2vfp.S

@@ -11,7 +11,7 @@
 //
 // extern float __negsf2vfp(float a);
 //
-// Returns the negation of a single precision floating point numbers using the 
+// Returns the negation of a single precision floating point numbers using the
 // Darwin calling convention where single arguments are passsed like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/nesf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __nesf2vfp(float a, float b);
 //
 // Returns one iff a != b and neither is NaN.
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/softfloat-alias.list

@@ -1,5 +1,5 @@
 #
-# These are soft float functions which can be 
+# These are soft float functions which can be
 # aliased to the *vfp functions on arm processors
 # that support floating point instructions.
 #

compiler-rt/lib/builtins/arm/subdf3vfp.S

@@ -11,7 +11,7 @@
 //
 // extern double __subdf3vfp(double a, double b);
 //
-// Returns difference between two double precision floating point numbers using 
+// Returns difference between two double precision floating point numbers using
 // the Darwin calling convention where double arguments are passsed in GPR pairs
 //
 	.syntax unified
@@ -22,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__subdf3vfp)
 #else
 	vmov 	d6, r0, r1         // move first param from r0/r1 pair into d6
 	vmov 	d7, r2, r3         // move second param from r2/r3 pair into d7
-	vsub.f64 d6, d6, d7		
+	vsub.f64 d6, d6, d7
 	vmov 	r0, r1, d6         // move result back to r0/r1 pair
 #endif
 	bx	lr

compiler-rt/lib/builtins/arm/sync-ops.h

@@ -1,16 +1,16 @@
-/*===-- sync-ops.h - --===//
+//===-- sync-ops.h - --===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements outline macros for the __sync_fetch_and_*
+// This file implements outline macros for the __sync_fetch_and_*
- * operations. Different instantiations will generate appropriate assembly for
+// operations. Different instantiations will generate appropriate assembly for
- * ARM and Thumb-2 versions of the functions.
+// ARM and Thumb-2 versions of the functions.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_add_4.S

@@ -1,19 +1,19 @@
-/*===-- sync_fetch_and_add_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_add_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_add_4 function for the ARM
+// This file implements the __sync_fetch_and_add_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 
-/* "adds" is 2 bytes shorter than "add". */
+// "adds" is 2 bytes shorter than "add".
 #define add_4(rD, rN, rM)  add rD, rN, rM
 
 SYNC_OP_4(add_4)

compiler-rt/lib/builtins/arm/sync_fetch_and_add_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_add_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_add_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_add_8 function for the ARM
+// This file implements the __sync_fetch_and_add_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_and_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_and_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_and_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_and_4 function for the ARM
+// This file implements the __sync_fetch_and_and_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_and_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_and_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_and_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_and_8 function for the ARM
+// This file implements the __sync_fetch_and_and_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_max_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_max_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_max_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_max_4 function for the ARM
+// This file implements the __sync_fetch_and_max_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_max_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_max_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_max_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_max_8 function for the ARM
+// This file implements the __sync_fetch_and_max_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_min_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_min_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_min_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_min_4 function for the ARM
+// This file implements the __sync_fetch_and_min_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_min_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_min_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_min_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_min_8 function for the ARM
+// This file implements the __sync_fetch_and_min_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_nand_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_nand_4.S - -----------------------------------------===//
+//===-- sync_fetch_and_nand_4.S - -----------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_nand_4 function for the ARM
+// This file implements the __sync_fetch_and_nand_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_nand_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_nand_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_nand_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_nand_8 function for the ARM
+// This file implements the __sync_fetch_and_nand_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_or_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_or_4.S - -------------------------------------------===//
+//===-- sync_fetch_and_or_4.S - -------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_or_4 function for the ARM
+// This file implements the __sync_fetch_and_or_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_or_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_or_8.S - -------------------------------------------===//
+//===-- sync_fetch_and_or_8.S - -------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_or_8 function for the ARM
+// This file implements the __sync_fetch_and_or_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_sub_4.S

@@ -1,19 +1,19 @@
-/*===-- sync_fetch_and_sub_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_sub_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_sub_4 function for the ARM
+// This file implements the __sync_fetch_and_sub_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 
-/* "subs" is 2 bytes shorter than "sub". */
+// "subs" is 2 bytes shorter than "sub".
 #define sub_4(rD, rN, rM)  sub rD, rN, rM
 
 SYNC_OP_4(sub_4)

compiler-rt/lib/builtins/arm/sync_fetch_and_sub_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_sub_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_sub_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_sub_8 function for the ARM
+// This file implements the __sync_fetch_and_sub_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_umax_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_umax_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_umax_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_umax_4 function for the ARM
+// This file implements the __sync_fetch_and_umax_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_umax_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_umax_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_umax_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_umax_8 function for the ARM
+// This file implements the __sync_fetch_and_umax_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_umin_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_umin_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_umin_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_umin_4 function for the ARM
+// This file implements the __sync_fetch_and_umin_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_umin_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_umin_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_umin_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_umin_8 function for the ARM
+// This file implements the __sync_fetch_and_umin_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_xor_4.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_xor_4.S - ------------------------------------------===//
+//===-- sync_fetch_and_xor_4.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_xor_4 function for the ARM
+// This file implements the __sync_fetch_and_xor_4 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_fetch_and_xor_8.S

@@ -1,15 +1,15 @@
-/*===-- sync_fetch_and_xor_8.S - ------------------------------------------===//
+//===-- sync_fetch_and_xor_8.S - ------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __sync_fetch_and_xor_8 function for the ARM
+// This file implements the __sync_fetch_and_xor_8 function for the ARM
- * architecture.
+// architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "sync-ops.h"
 

compiler-rt/lib/builtins/arm/sync_synchronize.S

@@ -8,12 +8,10 @@
 
 #include "../assembly.h"
 
-//
 // When compiling a use of the gcc built-in __sync_synchronize() in thumb1 mode
-// the compiler may emit a call to __sync_synchronize.  
+// the compiler may emit a call to __sync_synchronize.
-// On Darwin the implementation jumps to an OS supplied function named 
+// On Darwin the implementation jumps to an OS supplied function named
 // OSMemoryBarrier
-//
 
 	.text
 	.syntax unified
@@ -30,7 +28,7 @@ END_COMPILERRT_FUNCTION(__sync_synchronize)
 
 	// tell linker it can break up file at label boundaries
 	.subsections_via_symbols
-		
+
 #endif
 
 NO_EXEC_STACK_DIRECTIVE

compiler-rt/lib/builtins/arm/truncdfsf2vfp.S

@@ -12,7 +12,7 @@
 // extern float __truncdfsf2vfp(double a);
 //
 // Converts double precision float to signle precision result.
-// Uses Darwin calling convention where a double precision parameter is 
+// Uses Darwin calling convention where a double precision parameter is
 // passed in a R0/R1 pair and a signle precision result is returned in R0.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/udivmodsi4.S

@@ -1,15 +1,15 @@
-/*===-- udivmodsi4.S - 32-bit unsigned integer divide and modulus ---------===//
+//===-- udivmodsi4.S - 32-bit unsigned integer divide and modulus ---------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __udivmodsi4 (32-bit unsigned integer divide and
+// This file implements the __udivmodsi4 (32-bit unsigned integer divide and
- * modulus) function for the ARM 32-bit architecture.
+// modulus) function for the ARM 32-bit architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 
@@ -38,26 +38,25 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4)
 	beq	LOCAL_LABEL(divby1)
 	cmp	r0, r1
 	bcc	LOCAL_LABEL(quotient0)
-	/*
+
-	 * Implement division using binary long division algorithm.
+	// Implement division using binary long division algorithm.
-	 *
+	//
-	 * r0 is the numerator, r1 the denominator.
+	// r0 is the numerator, r1 the denominator.
-	 *
+	//
-	 * The code before JMP computes the correct shift I, so that
+	// The code before JMP computes the correct shift I, so that
-	 * r0 and (r1 << I) have the highest bit set in the same position.
+	// r0 and (r1 << I) have the highest bit set in the same position.
-	 * At the time of JMP, ip := .Ldiv0block - 12 * I.
+	// At the time of JMP, ip := .Ldiv0block - 12 * I.
-	 * This depends on the fixed instruction size of block.
+	// This depends on the fixed instruction size of block.
-	 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
+	// For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
-	 *
+	//
-	 * block(shift) implements the test-and-update-quotient core.
+	// block(shift) implements the test-and-update-quotient core.
-	 * It assumes (r0 << shift) can be computed without overflow and
+	// It assumes (r0 << shift) can be computed without overflow and
-	 * that (r0 << shift) < 2 * r1. The quotient is stored in r3.
+	// that (r0 << shift) < 2 * r1. The quotient is stored in r3.
-	 */
 
 #  ifdef __ARM_FEATURE_CLZ
 	clz	ip, r0
 	clz	r3, r1
-	/* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
+	// r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3.
 	sub	r3, r3, ip
 #    if defined(USE_THUMB_2)
 	adr	ip, LOCAL_LABEL(div0block) + 1
@@ -98,11 +97,11 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4)
 	movhs	r4, r3
 	subhs	ip, ip, #(2 * 12)
 
-	/* Last block, no need to update r3 or r4. */
+	// Last block, no need to update r3 or r4.
 	cmp	r1, r4, lsr #1
 	subls	ip, ip, #(1 * 12)
 
-	ldr	r4, [sp], #8	/* restore r4, we are done with it. */
+	ldr	r4, [sp], #8	// restore r4, we are done with it.
 	mov	r3, #0
 
 	JMP(ip)
@@ -163,7 +162,7 @@ LOCAL_LABEL(divby1):
 	mov	r3, #0
 	str	r3, [r2]
 	JMP(lr)
-#endif /* __ARM_ARCH_EXT_IDIV__ */
+#endif // __ARM_ARCH_EXT_IDIV__
 
 LOCAL_LABEL(divby0):
 	mov	r0, #0

compiler-rt/lib/builtins/arm/udivsi3.S

@@ -1,15 +1,15 @@
-/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===//
+//===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __udivsi3 (32-bit unsigned integer divide)
+// This file implements the __udivsi3 (32-bit unsigned integer divide)
- * function for the ARM 32-bit architecture.
+// function for the ARM 32-bit architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 
@@ -39,7 +39,7 @@ LOCAL_LABEL(divby0):
 	JMP(lr)
 #  endif
 
-#else /* ! __ARM_ARCH_EXT_IDIV__ */
+#else // ! __ARM_ARCH_EXT_IDIV__
 	cmp	r1, #1
 	bcc	LOCAL_LABEL(divby0)
 #if defined(USE_THUMB_1)
@@ -62,26 +62,24 @@ LOCAL_LABEL(num_ge_denom):
 	JMPc(lr, cc)
 #endif
 
-	/*
+	// Implement division using binary long division algorithm.
-	 * Implement division using binary long division algorithm.
+	//
-	 *
+	// r0 is the numerator, r1 the denominator.
-	 * r0 is the numerator, r1 the denominator.
+	//
-	 *
+	// The code before JMP computes the correct shift I, so that
-	 * The code before JMP computes the correct shift I, so that
+	// r0 and (r1 << I) have the highest bit set in the same position.
-	 * r0 and (r1 << I) have the highest bit set in the same position.
+	// At the time of JMP, ip := .Ldiv0block - 12 * I.
-	 * At the time of JMP, ip := .Ldiv0block - 12 * I.
+	// This depends on the fixed instruction size of block.
-	 * This depends on the fixed instruction size of block.
+	// For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
-	 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
+	//
-	 *
+	// block(shift) implements the test-and-update-quotient core.
-	 * block(shift) implements the test-and-update-quotient core.
+	// It assumes (r0 << shift) can be computed without overflow and
-	 * It assumes (r0 << shift) can be computed without overflow and
+	// that (r0 << shift) < 2 * r1. The quotient is stored in r3.
-	 * that (r0 << shift) < 2 * r1. The quotient is stored in r3.
-	 */
 
 #  if defined(__ARM_FEATURE_CLZ)
 	clz	ip, r0
 	clz	r3, r1
-	/* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
+	// r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3.
 	sub	r3, r3, ip
 #    if defined(USE_THUMB_2)
 	adr	ip, LOCAL_LABEL(div0block) + 1
@@ -93,7 +91,7 @@ LOCAL_LABEL(num_ge_denom):
 	sub	ip, ip, r3, lsl #3
 	mov	r3, #0
 	bx	ip
-#  else /* No CLZ Feature */
+#  else // No CLZ Feature
 #    if defined(USE_THUMB_2)
 #    error THUMB mode requires CLZ or UDIV
 #    endif
@@ -159,7 +157,7 @@ LOCAL_LABEL(skip_2):
 	subhs	ip, ip, #(2 * BLOCK_SIZE)
 #    endif
 
-	/* Last block, no need to update r2 or r3. */
+	// Last block, no need to update r2 or r3.
 #    if defined(USE_THUMB_1)
 	lsrs r3, r2, #1
 	cmp r3, r1
@@ -179,12 +177,12 @@ LOCAL_LABEL(skip_1):
 
 	JMP(ip)
 #    endif
-#  endif /* __ARM_FEATURE_CLZ */
+#  endif // __ARM_FEATURE_CLZ
 
 
 #define	IMM	#
-	/* due to the range limit of branch in Thumb1, we have to place the
+	// due to the range limit of branch in Thumb1, we have to place the
-		 block closer */
+	// block closer
 LOCAL_LABEL(divby0):
 	movs	r0, #0
 #      if defined(__ARM_EABI__)
@@ -203,13 +201,13 @@ LOCAL_LABEL(divby0):
 	blo LOCAL_LABEL(block_skip_##shift);                                         \
 	subs r0, r0, r2;                                                             \
 	LOCAL_LABEL(block_skip_##shift) :;                                           \
-	adcs r3, r3 /* same as ((r3 << 1) | Carry). Carry is set if r0 >= r2. */
+	adcs r3, r3 // same as ((r3 << 1) | Carry). Carry is set if r0 >= r2.
 
-	/* TODO: if current location counter is not not word aligned, we don't
+	// TODO: if current location counter is not not word aligned, we don't
-		 need the .p2align and nop */
+	// need the .p2align and nop
-	/* Label div0block must be word-aligned. First align block 31 */
+	// Label div0block must be word-aligned. First align block 31
 	.p2align 2
-	nop /* Padding to align div0block as 31 blocks = 310 bytes */
+	nop // Padding to align div0block as 31 blocks = 310 bytes
 
 #else
 #define block(shift)                                                           \
@@ -255,7 +253,7 @@ LOCAL_LABEL(div0block):
 
 	mov	r0, r3
 	JMP(lr)
-#endif /* __ARM_ARCH_EXT_IDIV__ */
+#endif // __ARM_ARCH_EXT_IDIV__
 
 END_COMPILERRT_FUNCTION(__udivsi3)
 

compiler-rt/lib/builtins/arm/umodsi3.S

@@ -1,15 +1,15 @@
-/*===-- umodsi3.S - 32-bit unsigned integer modulus -----------------------===//
+//===-- umodsi3.S - 32-bit unsigned integer modulus -----------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements the __umodsi3 (32-bit unsigned integer modulus)
+// This file implements the __umodsi3 (32-bit unsigned integer modulus)
- * function for the ARM 32-bit architecture.
+// function for the ARM 32-bit architecture.
- *
+//
- *===----------------------------------------------------------------------===*/
+//===----------------------------------------------------------------------===//
 
 #include "../assembly.h"
 
@@ -37,26 +37,25 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
 	cmp	r0, r1
 	IT(cc)
 	JMPc(lr, cc)
-	/*
+
-	 * Implement division using binary long division algorithm.
+	// Implement division using binary long division algorithm.
-	 *
+	//
-	 * r0 is the numerator, r1 the denominator.
+	// r0 is the numerator, r1 the denominator.
-	 *
+	//
-	 * The code before JMP computes the correct shift I, so that
+	// The code before JMP computes the correct shift I, so that
-	 * r0 and (r1 << I) have the highest bit set in the same position.
+	// r0 and (r1 << I) have the highest bit set in the same position.
-	 * At the time of JMP, ip := .Ldiv0block - 8 * I.
+	// At the time of JMP, ip := .Ldiv0block - 8 * I.
-	 * This depends on the fixed instruction size of block.
+	// This depends on the fixed instruction size of block.
-	 * For ARM mode, this is 8 Bytes, for THUMB mode 10 Bytes.
+	// For ARM mode, this is 8 Bytes, for THUMB mode 10 Bytes.
-	 *
+	//
-	 * block(shift) implements the test-and-update-quotient core.
+	// block(shift) implements the test-and-update-quotient core.
-	 * It assumes (r0 << shift) can be computed without overflow and
+	// It assumes (r0 << shift) can be computed without overflow and
-	 * that (r0 << shift) < 2 * r1. The quotient is stored in r3.
+	// that (r0 << shift) < 2 * r1. The quotient is stored in r3.
-	 */
 
 #  ifdef __ARM_FEATURE_CLZ
 	clz	ip, r0
 	clz	r3, r1
-	/* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
+	// r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3.
 	sub	r3, r3, ip
 #    if defined(USE_THUMB_2)
 	adr	ip, LOCAL_LABEL(div0block) + 1
@@ -93,7 +92,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
 	movhs	r2, r3
 	subhs	ip, ip, #(2 * 8)
 
-	/* Last block, no need to update r2 or r3. */
+	// Last block, no need to update r2 or r3.
 	cmp	r1, r2, lsr #1
 	subls	ip, ip, #(1 * 8)
 
@@ -141,7 +140,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
 LOCAL_LABEL(div0block):
 	block(0)
 	JMP(lr)
-#endif /* __ARM_ARCH_EXT_IDIV__ */
+#endif // __ARM_ARCH_EXT_IDIV__
 
 LOCAL_LABEL(divby0):
 	mov	r0, #0

compiler-rt/lib/builtins/arm/unorddf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __unorddf2vfp(double a, double b);
 //
 // Returns one iff a or b is NaN
-// Uses Darwin calling convention where double precision arguments are passsed 
+// Uses Darwin calling convention where double precision arguments are passsed
 // like in GPR pairs.
 //
 	.syntax unified

compiler-rt/lib/builtins/arm/unordsf2vfp.S

@@ -12,7 +12,7 @@
 // extern int __unordsf2vfp(float a, float b);
 //
 // Returns one iff a or b is NaN
-// Uses Darwin calling convention where single precision arguments are passsed 
+// Uses Darwin calling convention where single precision arguments are passsed
 // like 32-bit ints
 //
 	.syntax unified

compiler-rt/lib/builtins/ashldi3.c

@@ -1,33 +1,30 @@
-/* ====-- ashldi3.c - Implement __ashldi3 -----------------------------------===
+// ====-- ashldi3.c - Implement __ashldi3 ---------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ashldi3 for the compiler_rt library.
+// This file implements __ashldi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a << b */
+// Returns: a << b
 
-/* Precondition:  0 <= b < bits_in_dword */
+// Precondition:  0 <= b < bits_in_dword
 
 COMPILER_RT_ABI di_int __ashldi3(di_int a, si_int b) {
   const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
   dwords input;
   dwords result;
   input.all = a;
-  if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */
+  if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ {
-  {
     result.s.low = 0;
     result.s.high = input.s.low << (b - bits_in_word);
-  } else /* 0 <= b < bits_in_word */
+  } else /* 0 <= b < bits_in_word */ {
-  {
     if (b == 0)
       return a;
     result.s.low = input.s.low << b;

compiler-rt/lib/builtins/ashlti3.c

@@ -1,35 +1,32 @@
-/* ===-- ashlti3.c - Implement __ashlti3 -----------------------------------===
+//===-- ashlti3.c - Implement __ashlti3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ashlti3 for the compiler_rt library.
+// This file implements __ashlti3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: a << b */
+// Returns: a << b
 
-/* Precondition:  0 <= b < bits_in_tword */
+// Precondition:  0 <= b < bits_in_tword
 
 COMPILER_RT_ABI ti_int __ashlti3(ti_int a, si_int b) {
   const int bits_in_dword = (int)(sizeof(di_int) * CHAR_BIT);
   twords input;
   twords result;
   input.all = a;
-  if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */
+  if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */ {
-  {
     result.s.low = 0;
     result.s.high = input.s.low << (b - bits_in_dword);
-  } else /* 0 <= b < bits_in_dword */
+  } else /* 0 <= b < bits_in_dword */ {
-  {
     if (b == 0)
       return a;
     result.s.low = input.s.low << b;
@@ -38,4 +35,4 @@ COMPILER_RT_ABI ti_int __ashlti3(ti_int a, si_int b) {
   return result.all;
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/ashrdi3.c

@@ -1,34 +1,31 @@
-/*===-- ashrdi3.c - Implement __ashrdi3 -----------------------------------===
+//===-- ashrdi3.c - Implement __ashrdi3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ashrdi3 for the compiler_rt library.
+// This file implements __ashrdi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: arithmetic a >> b */
+// Returns: arithmetic a >> b
 
-/* Precondition:  0 <= b < bits_in_dword */
+// Precondition:  0 <= b < bits_in_dword
 
 COMPILER_RT_ABI di_int __ashrdi3(di_int a, si_int b) {
   const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
   dwords input;
   dwords result;
   input.all = a;
-  if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */
+  if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ {
-  {
+    // result.s.high = input.s.high < 0 ? -1 : 0
-    /* result.s.high = input.s.high < 0 ? -1 : 0 */
     result.s.high = input.s.high >> (bits_in_word - 1);
     result.s.low = input.s.high >> (b - bits_in_word);
-  } else /* 0 <= b < bits_in_word */
+  } else /* 0 <= b < bits_in_word */ {
-  {
     if (b == 0)
       return a;
     result.s.high = input.s.high >> b;

compiler-rt/lib/builtins/ashrti3.c

@@ -1,36 +1,33 @@
-/* ===-- ashrti3.c - Implement __ashrti3 -----------------------------------===
+//===-- ashrti3.c - Implement __ashrti3 -----------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ashrti3 for the compiler_rt library.
+// This file implements __ashrti3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: arithmetic a >> b */
+// Returns: arithmetic a >> b
 
-/* Precondition:  0 <= b < bits_in_tword */
+// Precondition:  0 <= b < bits_in_tword
 
 COMPILER_RT_ABI ti_int __ashrti3(ti_int a, si_int b) {
   const int bits_in_dword = (int)(sizeof(di_int) * CHAR_BIT);
   twords input;
   twords result;
   input.all = a;
-  if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */
+  if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */ {
-  {
+    // result.s.high = input.s.high < 0 ? -1 : 0
-    /* result.s.high = input.s.high < 0 ? -1 : 0 */
     result.s.high = input.s.high >> (bits_in_dword - 1);
     result.s.low = input.s.high >> (b - bits_in_dword);
-  } else /* 0 <= b < bits_in_dword */
+  } else /* 0 <= b < bits_in_dword */ {
-  {
     if (b == 0)
       return a;
     result.s.high = input.s.high >> b;
@@ -39,4 +36,4 @@ COMPILER_RT_ABI ti_int __ashrti3(ti_int a, si_int b) {
   return result.all;
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/assembly.h

@@ -1,16 +1,15 @@
-/* ===-- assembly.h - compiler-rt assembler support macros -----------------===
+//===-- assembly.h - compiler-rt assembler support macros -----------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file defines macros for use in compiler-rt assembler source.
+// This file defines macros for use in compiler-rt assembler source.
- * This file is not part of the interface of this library.
+// This file is not part of the interface of this library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef COMPILERRT_ASSEMBLY_H
 #define COMPILERRT_ASSEMBLY_H
@@ -68,11 +67,9 @@
 
 #if defined(__arm__)
 
-/*
+// Determine actual [ARM][THUMB[1][2]] ISA using compiler predefined macros:
- * Determine actual [ARM][THUMB[1][2]] ISA using compiler predefined macros:
+// - for '-mthumb -march=armv6' compiler defines '__thumb__'
- * - for '-mthumb -march=armv6' compiler defines '__thumb__'
+// - for '-mthumb -march=armv7' compiler defines '__thumb__' and '__thumb2__'
- * - for '-mthumb -march=armv7' compiler defines '__thumb__' and '__thumb2__'
- */
 #if defined(__thumb2__) || defined(__thumb__)
 #define DEFINE_CODE_STATE .thumb SEPARATOR
 #define DECLARE_FUNC_ENCODING    .thumb_func SEPARATOR
@@ -200,4 +197,4 @@
 #define END_COMPILERRT_FUNCTION(name)
 #endif
 
-#endif /* COMPILERRT_ASSEMBLY_H */
+#endif // COMPILERRT_ASSEMBLY_H

compiler-rt/lib/builtins/atomic.c

@@ -1,28 +1,27 @@
-/*===-- atomic.c - Implement support functions for atomic operations.------===
+//===-- atomic.c - Implement support functions for atomic operations.------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- *  atomic.c defines a set of functions for performing atomic accesses on
+//  atomic.c defines a set of functions for performing atomic accesses on
- *  arbitrary-sized memory locations.  This design uses locks that should
+//  arbitrary-sized memory locations.  This design uses locks that should
- *  be fast in the uncontended case, for two reasons:
+//  be fast in the uncontended case, for two reasons:
- *
+//
- *  1) This code must work with C programs that do not link to anything
+//  1) This code must work with C programs that do not link to anything
- *     (including pthreads) and so it should not depend on any pthread
+//     (including pthreads) and so it should not depend on any pthread
- *     functions.
+//     functions.
- *  2) Atomic operations, rather than explicit mutexes, are most commonly used
+//  2) Atomic operations, rather than explicit mutexes, are most commonly used
- *     on code where contended operations are rate.
+//     on code where contended operations are rate.
- *
+//
- *  To avoid needing a per-object lock, this code allocates an array of
+//  To avoid needing a per-object lock, this code allocates an array of
- *  locks and hashes the object pointers to find the one that it should use.
+//  locks and hashes the object pointers to find the one that it should use.
- *  For operations that must be atomic on two locations, the lower lock is
+//  For operations that must be atomic on two locations, the lower lock is
- *  always acquired first, to avoid deadlock.
+//  always acquired first, to avoid deadlock.
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include <stdint.h>
 #include <string.h>

compiler-rt/lib/builtins/atomic_flag_clear.c

@@ -1,15 +1,14 @@
-/*===-- atomic_flag_clear.c -------------------------------------------------===
+//===-- atomic_flag_clear.c -----------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_flag_clear from C11's stdatomic.h.
+// This file implements atomic_flag_clear from C11's stdatomic.h.
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/atomic_flag_clear_explicit.c

@@ -1,15 +1,14 @@
-/*===-- atomic_flag_clear_explicit.c ----------------------------------------===
+//===-- atomic_flag_clear_explicit.c --------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_flag_clear_explicit from C11's stdatomic.h.
+// This file implements atomic_flag_clear_explicit from C11's stdatomic.h.
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/atomic_flag_test_and_set.c

@@ -1,15 +1,14 @@
-/*===-- atomic_flag_test_and_set.c ------------------------------------------===
+//===-- atomic_flag_test_and_set.c ----------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_flag_test_and_set from C11's stdatomic.h.
+// This file implements atomic_flag_test_and_set from C11's stdatomic.h.
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/atomic_flag_test_and_set_explicit.c

@@ -1,15 +1,14 @@
-/*===-- atomic_flag_test_and_set_explicit.c ---------------------------------===
+//===-- atomic_flag_test_and_set_explicit.c -------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_flag_test_and_set_explicit from C11's stdatomic.h
+// This file implements atomic_flag_test_and_set_explicit from C11's stdatomic.h
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/atomic_signal_fence.c

@@ -1,15 +1,14 @@
-/*===-- atomic_signal_fence.c -----------------------------------------------===
+//===-- atomic_signal_fence.c ---------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_signal_fence from C11's stdatomic.h.
+// This file implements atomic_signal_fence from C11's stdatomic.h.
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/atomic_thread_fence.c

@@ -1,15 +1,14 @@
-/*===-- atomic_thread_fence.c -----------------------------------------------===
+//===-- atomic_thread_fence.c ---------------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements atomic_thread_fence from C11's stdatomic.h.
+// This file implements atomic_thread_fence from C11's stdatomic.h.
- *
+//
- *===------------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #ifndef __has_include
 #define __has_include(inc) 0

compiler-rt/lib/builtins/bswapdi2.c

@@ -1,15 +1,14 @@
-/* ===-- bswapdi2.c - Implement __bswapdi2 ---------------------------------===
+//===-- bswapdi2.c - Implement __bswapdi2 ---------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __bswapdi2 for the compiler_rt library.
+// This file implements __bswapdi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 

compiler-rt/lib/builtins/bswapsi2.c

@@ -1,15 +1,14 @@
-/* ===-- bswapsi2.c - Implement __bswapsi2 ---------------------------------===
+//===-- bswapsi2.c - Implement __bswapsi2 ---------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __bswapsi2 for the compiler_rt library.
+// This file implements __bswapsi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 

compiler-rt/lib/builtins/clear_cache.c

@@ -1,11 +1,10 @@
-/* ===-- clear_cache.c - Implement __clear_cache ---------------------------===
+//===-- clear_cache.c - Implement __clear_cache ---------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 #include <assert.h>
@@ -16,8 +15,8 @@
 #endif
 
 #if defined(_WIN32)
-/* Forward declare Win32 APIs since the GCC mode driver does not handle the
+// Forward declare Win32 APIs since the GCC mode driver does not handle the
-   newer SDKs as well as needed.  */
+// newer SDKs as well as needed.
 uint32_t FlushInstructionCache(uintptr_t hProcess, void *lpBaseAddress,
                                uintptr_t dwSize);
 uintptr_t GetCurrentProcess(void);
@@ -42,42 +41,40 @@ uintptr_t GetCurrentProcess(void);
 #include <sys/syscall.h>
 #include <unistd.h>
 #if defined(__ANDROID__) && defined(__LP64__)
-/*
+// clear_mips_cache - Invalidates instruction cache for Mips.
- * clear_mips_cache - Invalidates instruction cache for Mips.
- */
 static void clear_mips_cache(const void *Addr, size_t Size) {
   __asm__ volatile(
       ".set push\n"
       ".set noreorder\n"
       ".set noat\n"
-      "beq %[Size], $zero, 20f\n" /* If size == 0, branch around. */
+      "beq %[Size], $zero, 20f\n" // If size == 0, branch around.
       "nop\n"
-      "daddu %[Size], %[Addr], %[Size]\n" /* Calculate end address + 1 */
+      "daddu %[Size], %[Addr], %[Size]\n" // Calculate end address + 1
-      "rdhwr $v0, $1\n"                   /* Get step size for SYNCI.
+      "rdhwr $v0, $1\n"                   // Get step size for SYNCI.
-                                             $1 is $HW_SYNCI_Step */
+                                          // $1 is $HW_SYNCI_Step
-      "beq $v0, $zero, 20f\n"             /* If no caches require
+      "beq $v0, $zero, 20f\n"             // If no caches require
-                                             synchronization, branch
+                                          // synchronization, branch
-                                             around. */
+                                          // around.
       "nop\n"
       "10:\n"
-      "synci 0(%[Addr])\n"            /* Synchronize all caches around
+      "synci 0(%[Addr])\n"            // Synchronize all caches around
-                                         address. */
+                                      // address.
-      "daddu %[Addr], %[Addr], $v0\n" /* Add step size. */
+      "daddu %[Addr], %[Addr], $v0\n" // Add step size.
-      "sltu $at, %[Addr], %[Size]\n"  /* Compare current with end
+      "sltu $at, %[Addr], %[Size]\n"  // Compare current with end
-                                         address. */
+                                      // address.
-      "bne $at, $zero, 10b\n"         /* Branch if more to do. */
+      "bne $at, $zero, 10b\n"         // Branch if more to do.
       "nop\n"
-      "sync\n" /* Clear memory hazards. */
+      "sync\n" // Clear memory hazards.
       "20:\n"
       "bal 30f\n"
       "nop\n"
       "30:\n"
-      "daddiu $ra, $ra, 12\n" /* $ra has a value of $pc here.
+      "daddiu $ra, $ra, 12\n" // $ra has a value of $pc here.
-                                 Add offset of 12 to point to the
+                              // Add offset of 12 to point to the
-                                 instruction after the last nop.
+                              // instruction after the last nop.
-                               */
+                              //
-      "jr.hb $ra\n"           /* Return, clearing instruction
+      "jr.hb $ra\n"           // Return, clearing instruction
-                                 hazards. */
+                              // hazards.
       "nop\n"
       ".set pop\n"
       : [ Addr ] "+r"(Addr), [ Size ] "+r"(Size)::"at", "ra", "v0", "memory");
@@ -85,19 +82,15 @@ static void clear_mips_cache(const void *Addr, size_t Size) {
 #endif
 #endif
 
-/*
+// The compiler generates calls to __clear_cache() when creating
- * The compiler generates calls to __clear_cache() when creating
+// trampoline functions on the stack for use with nested functions.
- * trampoline functions on the stack for use with nested functions.
+// It is expected to invalidate the instruction cache for the
- * It is expected to invalidate the instruction cache for the
+// specified range.
- * specified range.
- */
 
 void __clear_cache(void *start, void *end) {
 #if __i386__ || __x86_64__ || defined(_M_IX86) || defined(_M_X64)
-/*
+// Intel processors have a unified instruction and data cache
- * Intel processors have a unified instruction and data cache
+// so there is nothing to do
- * so there is nothing to do
- */
 #elif defined(_WIN32) && (defined(__arm__) || defined(__aarch64__))
   FlushInstructionCache(GetCurrentProcess(), start, end - start);
 #elif defined(__arm__) && !defined(__APPLE__)
@@ -109,14 +102,12 @@ void __clear_cache(void *start, void *end) {
 
   sysarch(ARM_SYNC_ICACHE, &arg);
 #elif defined(__linux__)
-/*
+// We used to include asm/unistd.h for the __ARM_NR_cacheflush define, but
- * We used to include asm/unistd.h for the __ARM_NR_cacheflush define, but
+// it also brought many other unused defines, as well as a dependency on
- * it also brought many other unused defines, as well as a dependency on
+// kernel headers to be installed.
- * kernel headers to be installed.
+//
- *
+// This value is stable at least since Linux 3.13 and should remain so for
- * This value is stable at least since Linux 3.13 and should remain so for
+// compatibility reasons, warranting it's re-definition here.
- * compatibility reasons, warranting it's re-definition here.
- */
 #define __ARM_NR_cacheflush 0x0f0002
   register int start_reg __asm("r0") = (int)(intptr_t)start;
   const register int end_reg __asm("r1") = (int)(intptr_t)end;
@@ -154,10 +145,8 @@ void __clear_cache(void *start, void *end) {
   uint64_t ctr_el0;
   __asm __volatile("mrs %0, ctr_el0" : "=r"(ctr_el0));
 
-  /*
+  // dc & ic instructions must use 64bit registers so we don't use
-   * dc & ic instructions must use 64bit registers so we don't use
+  // uintptr_t in case this runs in an IPL32 environment.
-   * uintptr_t in case this runs in an IPL32 environment.
-   */
   const size_t dcache_line_size = 4 << ((ctr_el0 >> 16) & 15);
   for (addr = xstart & ~(dcache_line_size - 1); addr < xend;
        addr += dcache_line_size)
@@ -186,7 +175,7 @@ void __clear_cache(void *start, void *end) {
   __asm__ volatile("isync");
 #else
 #if __APPLE__
-  /* On Darwin, sys_icache_invalidate() provides this functionality */
+  // On Darwin, sys_icache_invalidate() provides this functionality
   sys_icache_invalidate(start, end - start);
 #else
   compilerrt_abort();

compiler-rt/lib/builtins/clzdi2.c

@@ -1,31 +1,30 @@
-/* ===-- clzdi2.c - Implement __clzdi2 -------------------------------------===
+//===-- clzdi2.c - Implement __clzdi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __clzdi2 for the compiler_rt library.
+// This file implements __clzdi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: the number of leading 0-bits */
+// Returns: the number of leading 0-bits
 
 #if !defined(__clang__) &&                                                     \
     ((defined(__sparc__) && defined(__arch64__)) || defined(__mips64) ||       \
      (defined(__riscv) && __SIZEOF_POINTER__ >= 8))
-/* On 64-bit architectures with neither a native clz instruction nor a native
+// On 64-bit architectures with neither a native clz instruction nor a native
- * ctz instruction, gcc resolves __builtin_clz to __clzdi2 rather than
+// ctz instruction, gcc resolves __builtin_clz to __clzdi2 rather than
- * __clzsi2, leading to infinite recursion. */
+// __clzsi2, leading to infinite recursion.
 #define __builtin_clz(a) __clzsi2(a)
 extern si_int __clzsi2(si_int);
 #endif
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __clzdi2(di_int a) {
   dwords x;

compiler-rt/lib/builtins/clzsi2.c

@@ -1,50 +1,48 @@
-/* ===-- clzsi2.c - Implement __clzsi2 -------------------------------------===
+//===-- clzsi2.c - Implement __clzsi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __clzsi2 for the compiler_rt library.
+// This file implements __clzsi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: the number of leading 0-bits */
+// Returns: the number of leading 0-bits
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __clzsi2(si_int a) {
   su_int x = (su_int)a;
-  si_int t = ((x & 0xFFFF0000) == 0) << 4; /* if (x is small) t = 16 else 0 */
+  si_int t = ((x & 0xFFFF0000) == 0) << 4; // if (x is small) t = 16 else 0
-  x >>= 16 - t;                            /* x = [0 - 0xFFFF] */
+  x >>= 16 - t;                            // x = [0 - 0xFFFF]
-  su_int r = t;                            /* r = [0, 16] */
+  su_int r = t;                            // r = [0, 16]
-  /* return r + clz(x) */
+  // return r + clz(x)
   t = ((x & 0xFF00) == 0) << 3;
-  x >>= 8 - t; /* x = [0 - 0xFF] */
+  x >>= 8 - t; // x = [0 - 0xFF]
-  r += t;      /* r = [0, 8, 16, 24] */
+  r += t;      // r = [0, 8, 16, 24]
-  /* return r + clz(x) */
+  // return r + clz(x)
   t = ((x & 0xF0) == 0) << 2;
-  x >>= 4 - t; /* x = [0 - 0xF] */
+  x >>= 4 - t; // x = [0 - 0xF]
-  r += t;      /* r = [0, 4, 8, 12, 16, 20, 24, 28] */
+  r += t;      // r = [0, 4, 8, 12, 16, 20, 24, 28]
-  /* return r + clz(x) */
+  // return r + clz(x)
   t = ((x & 0xC) == 0) << 1;
-  x >>= 2 - t; /* x = [0 - 3] */
+  x >>= 2 - t; // x = [0 - 3]
-  r += t;      /* r = [0 - 30] and is even */
+  r += t;      // r = [0 - 30] and is even
-  /* return r + clz(x) */
+  // return r + clz(x)
-  /*     switch (x)
+  //     switch (x)
-   *     {
+  //     {
-   *     case 0:
+  //     case 0:
-   *         return r + 2;
+  //         return r + 2;
-   *     case 1:
+  //     case 1:
-   *         return r + 1;
+  //         return r + 1;
-   *     case 2:
+  //     case 2:
-   *     case 3:
+  //     case 3:
-   *         return r;
+  //         return r;
-   *     }
+  //     }
-   */
   return r + ((2 - x) & -((x & 2) == 0));
 }

compiler-rt/lib/builtins/clzti2.c

@@ -1,23 +1,22 @@
-/* ===-- clzti2.c - Implement __clzti2 -------------------------------------===
+//===-- clzti2.c - Implement __clzti2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __clzti2 for the compiler_rt library.
+// This file implements __clzti2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: the number of leading 0-bits */
+// Returns: the number of leading 0-bits
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __clzti2(ti_int a) {
   twords x;
@@ -27,4 +26,4 @@ COMPILER_RT_ABI si_int __clzti2(ti_int a) {
          ((si_int)f & ((si_int)(sizeof(di_int) * CHAR_BIT)));
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/cmpdi2.c

@@ -1,22 +1,20 @@
-/* ===-- cmpdi2.c - Implement __cmpdi2 -------------------------------------===
+//===-- cmpdi2.c - Implement __cmpdi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __cmpdi2 for the compiler_rt library.
+// This file implements __cmpdi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: if (a <  b) returns 0
+// Returns: if (a <  b) returns 0
- *           if (a == b) returns 1
+//           if (a == b) returns 1
- *           if (a >  b) returns 2
+//           if (a >  b) returns 2
- */
 
 COMPILER_RT_ABI si_int __cmpdi2(di_int a, di_int b) {
   dwords x;
@@ -35,10 +33,9 @@ COMPILER_RT_ABI si_int __cmpdi2(di_int a, di_int b) {
 }
 
 #ifdef __ARM_EABI__
-/* Returns: if (a <  b) returns -1
+// Returns: if (a <  b) returns -1
- *           if (a == b) returns  0
+//           if (a == b) returns  0
- *           if (a >  b) returns  1
+//           if (a >  b) returns  1
- */
 COMPILER_RT_ABI si_int __aeabi_lcmp(di_int a, di_int b) {
   return __cmpdi2(a, b) - 1;
 }

compiler-rt/lib/builtins/cmpti2.c

@@ -1,24 +1,22 @@
-/* ===-- cmpti2.c - Implement __cmpti2 -------------------------------------===
+//===-- cmpti2.c - Implement __cmpti2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __cmpti2 for the compiler_rt library.
+// This file implements __cmpti2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns:  if (a <  b) returns 0
+// Returns:  if (a <  b) returns 0
- *           if (a == b) returns 1
+//           if (a == b) returns 1
- *           if (a >  b) returns 2
+//           if (a >  b) returns 2
- */
 
 COMPILER_RT_ABI si_int __cmpti2(ti_int a, ti_int b) {
   twords x;
@@ -36,4 +34,4 @@ COMPILER_RT_ABI si_int __cmpti2(ti_int a, ti_int b) {
   return 1;
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/cpu_model.c

@@ -31,8 +31,8 @@
 #endif
 
 enum VendorSignatures {
-  SIG_INTEL = 0x756e6547 /* Genu */,
+  SIG_INTEL = 0x756e6547, // Genu
-  SIG_AMD = 0x68747541 /* Auth */
+  SIG_AMD = 0x68747541,   // Auth
 };
 
 enum ProcessorVendors {
@@ -612,11 +612,11 @@ __attribute__((visibility("hidden")))
 #endif
 unsigned int __cpu_features2;
 
-/* A constructor function that is sets __cpu_model and __cpu_features2 with
+// A constructor function that is sets __cpu_model and __cpu_features2 with
-   the right values.  This needs to run only once.  This constructor is
+// the right values.  This needs to run only once.  This constructor is
-   given the highest priority and it should run before constructors without
+// given the highest priority and it should run before constructors without
-   the priority set.  However, it still runs after ifunc initializers and
+// the priority set.  However, it still runs after ifunc initializers and
-   needs to be called explicitly there.  */
+// needs to be called explicitly there.
 
 int CONSTRUCTOR_ATTRIBUTE __cpu_indicator_init(void) {
   unsigned EAX, EBX, ECX, EDX;
@@ -626,14 +626,14 @@ int CONSTRUCTOR_ATTRIBUTE __cpu_indicator_init(void) {
   unsigned Features = 0;
   unsigned Features2 = 0;
 
-  /* This function needs to run just once.  */
+  // This function needs to run just once.
   if (__cpu_model.__cpu_vendor)
     return 0;
 
   if (!isCpuIdSupported())
     return -1;
 
-  /* Assume cpuid insn present. Run in level 0 to get vendor id. */
+  // Assume cpuid insn present. Run in level 0 to get vendor id.
   if (getX86CpuIDAndInfo(0, &MaxLeaf, &Vendor, &ECX, &EDX) || MaxLeaf < 1) {
     __cpu_model.__cpu_vendor = VENDOR_OTHER;
     return -1;
@@ -642,19 +642,19 @@ int CONSTRUCTOR_ATTRIBUTE __cpu_indicator_init(void) {
   detectX86FamilyModel(EAX, &Family, &Model);
   Brand_id = EBX & 0xff;
 
-  /* Find available features. */
+  // Find available features.
   getAvailableFeatures(ECX, EDX, MaxLeaf, &Features, &Features2);
   __cpu_model.__cpu_features[0] = Features;
   __cpu_features2 = Features2;
 
   if (Vendor == SIG_INTEL) {
-    /* Get CPU type.  */
+    // Get CPU type.
     getIntelProcessorTypeAndSubtype(Family, Model, Brand_id, Features,
                                     Features2, &(__cpu_model.__cpu_type),
                                     &(__cpu_model.__cpu_subtype));
     __cpu_model.__cpu_vendor = VENDOR_INTEL;
   } else if (Vendor == SIG_AMD) {
-    /* Get CPU type.  */
+    // Get CPU type.
     getAMDProcessorTypeAndSubtype(Family, Model, Features, Features2,
                                   &(__cpu_model.__cpu_type),
                                   &(__cpu_model.__cpu_subtype));

compiler-rt/lib/builtins/ctzdi2.c

@@ -1,31 +1,30 @@
-/* ===-- ctzdi2.c - Implement __ctzdi2 -------------------------------------===
+//===-- ctzdi2.c - Implement __ctzdi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ctzdi2 for the compiler_rt library.
+// This file implements __ctzdi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: the number of trailing 0-bits  */
+// Returns: the number of trailing 0-bits
 
 #if !defined(__clang__) &&                                                     \
     ((defined(__sparc__) && defined(__arch64__)) || defined(__mips64) ||       \
      (defined(__riscv) && __SIZEOF_POINTER__ >= 8))
-/* On 64-bit architectures with neither a native clz instruction nor a native
+// On 64-bit architectures with neither a native clz instruction nor a native
- * ctz instruction, gcc resolves __builtin_ctz to __ctzdi2 rather than
+// ctz instruction, gcc resolves __builtin_ctz to __ctzdi2 rather than
- * __ctzsi2, leading to infinite recursion. */
+// __ctzsi2, leading to infinite recursion.
 #define __builtin_ctz(a) __ctzsi2(a)
 extern si_int __ctzsi2(si_int);
 #endif
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __ctzdi2(di_int a) {
   dwords x;

compiler-rt/lib/builtins/ctzsi2.c

@@ -1,55 +1,53 @@
-/* ===-- ctzsi2.c - Implement __ctzsi2 -------------------------------------===
+//===-- ctzsi2.c - Implement __ctzsi2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ctzsi2 for the compiler_rt library.
+// This file implements __ctzsi2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: the number of trailing 0-bits */
+// Returns: the number of trailing 0-bits
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __ctzsi2(si_int a) {
   su_int x = (su_int)a;
   si_int t = ((x & 0x0000FFFF) == 0)
-             << 4; /* if (x has no small bits) t = 16 else 0 */
+             << 4; // if (x has no small bits) t = 16 else 0
-  x >>= t;         /* x = [0 - 0xFFFF] + higher garbage bits */
+  x >>= t;         // x = [0 - 0xFFFF] + higher garbage bits
-  su_int r = t;    /* r = [0, 16]  */
+  su_int r = t;    // r = [0, 16]
-  /* return r + ctz(x) */
+  // return r + ctz(x)
   t = ((x & 0x00FF) == 0) << 3;
-  x >>= t; /* x = [0 - 0xFF] + higher garbage bits */
+  x >>= t; // x = [0 - 0xFF] + higher garbage bits
-  r += t;  /* r = [0, 8, 16, 24] */
+  r += t;  // r = [0, 8, 16, 24]
-  /* return r + ctz(x) */
+  // return r + ctz(x)
   t = ((x & 0x0F) == 0) << 2;
-  x >>= t; /* x = [0 - 0xF] + higher garbage bits */
+  x >>= t; // x = [0 - 0xF] + higher garbage bits
-  r += t;  /* r = [0, 4, 8, 12, 16, 20, 24, 28] */
+  r += t;  // r = [0, 4, 8, 12, 16, 20, 24, 28]
-  /* return r + ctz(x) */
+  // return r + ctz(x)
   t = ((x & 0x3) == 0) << 1;
   x >>= t;
-  x &= 3; /* x = [0 - 3] */
+  x &= 3; // x = [0 - 3]
-  r += t; /* r = [0 - 30] and is even */
+  r += t; // r = [0 - 30] and is even
-  /* return r + ctz(x) */
+  // return r + ctz(x)
 
-  /*  The branch-less return statement below is equivalent
+  //  The branch-less return statement below is equivalent
-   *  to the following switch statement:
+  //  to the following switch statement:
-   *     switch (x)
+  //     switch (x)
-   *    {
+  //    {
-   *     case 0:
+  //     case 0:
-   *         return r + 2;
+  //         return r + 2;
-   *     case 2:
+  //     case 2:
-   *         return r + 1;
+  //         return r + 1;
-   *     case 1:
+  //     case 1:
-   *     case 3:
+  //     case 3:
-   *         return r;
+  //         return r;
-   *     }
+  //     }
-   */
   return r + ((2 - (x >> 1)) & -((x & 1) == 0));
 }

compiler-rt/lib/builtins/ctzti2.c

@@ -1,23 +1,22 @@
-/* ===-- ctzti2.c - Implement __ctzti2 -------------------------------------===
+//===-- ctzti2.c - Implement __ctzti2 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __ctzti2 for the compiler_rt library.
+// This file implements __ctzti2 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: the number of trailing 0-bits */
+// Returns: the number of trailing 0-bits
 
-/* Precondition: a != 0 */
+// Precondition: a != 0
 
 COMPILER_RT_ABI si_int __ctzti2(ti_int a) {
   twords x;
@@ -27,4 +26,4 @@ COMPILER_RT_ABI si_int __ctzti2(ti_int a) {
          ((si_int)f & ((si_int)(sizeof(di_int) * CHAR_BIT)));
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT

compiler-rt/lib/builtins/divdc3.c

@@ -1,22 +1,21 @@
-/* ===-- divdc3.c - Implement __divdc3 -------------------------------------===
+//===-- divdc3.c - Implement __divdc3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divdc3 for the compiler_rt library.
+// This file implements __divdc3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
 #include "int_lib.h"
 #include "int_math.h"
 
-/* Returns: the quotient of (a + ib) / (c + id) */
+// Returns: the quotient of (a + ib) / (c + id)
 
 COMPILER_RT_ABI Dcomplex __divdc3(double __a, double __b, double __c,
                                   double __d) {

compiler-rt/lib/builtins/divdi3.c

@@ -1,27 +1,25 @@
-/* ===-- divdi3.c - Implement __divdi3 -------------------------------------===
+//===-- divdi3.c - Implement __divdi3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divdi3 for the compiler_rt library.
+// This file implements __divdi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a / b */
+// Returns: a / b
 
 COMPILER_RT_ABI di_int __divdi3(di_int a, di_int b) {
   const int bits_in_dword_m1 = (int)(sizeof(di_int) * CHAR_BIT) - 1;
-  di_int s_a = a >> bits_in_dword_m1; /* s_a = a < 0 ? -1 : 0 */
+  di_int s_a = a >> bits_in_dword_m1;                   // s_a = a < 0 ? -1 : 0
-  di_int s_b = b >> bits_in_dword_m1; /* s_b = b < 0 ? -1 : 0 */
+  di_int s_b = b >> bits_in_dword_m1;                   // s_b = b < 0 ? -1 : 0
-  a = (a ^ s_a) - s_a;                /* negate if s_a == -1 */
+  a = (a ^ s_a) - s_a;                                  // negate if s_a == -1
-  b = (b ^ s_b) - s_b;                /* negate if s_b == -1 */
+  b = (b ^ s_b) - s_b;                                  // negate if s_b == -1
-  s_a ^= s_b;                         /*sign of quotient */
+  s_a ^= s_b;                                           // sign of quotient
-  return (__udivmoddi4(a, b, (du_int *)0) ^ s_a) -
+  return (__udivmoddi4(a, b, (du_int *)0) ^ s_a) - s_a; // negate if s_a == -1
-         s_a; /* negate if s_a == -1 */
 }

compiler-rt/lib/builtins/divmoddi4.c

@@ -1,19 +1,18 @@
-/*===-- divmoddi4.c - Implement __divmoddi4 --------------------------------===
+//===-- divmoddi4.c - Implement __divmoddi4 -------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divmoddi4 for the compiler_rt library.
+// This file implements __divmoddi4 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a / b, *rem = a % b  */
+// Returns: a / b, *rem = a % b
 
 COMPILER_RT_ABI di_int __divmoddi4(di_int a, di_int b, di_int *rem) {
   di_int d = __divdi3(a, b);

compiler-rt/lib/builtins/divmodsi4.c

@@ -1,19 +1,19 @@
-/*===-- divmodsi4.c - Implement __divmodsi4 --------------------------------===
+//===-- divmodsi4.c - Implement __divmodsi4
- *
+//--------------------------------===//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+//
- * See https://llvm.org/LICENSE.txt for license information.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
- *
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- * ===----------------------------------------------------------------------===
+//
- *
+//===----------------------------------------------------------------------===//
- * This file implements __divmodsi4 for the compiler_rt library.
+//
- *
+// This file implements __divmodsi4 for the compiler_rt library.
- * ===----------------------------------------------------------------------===
+//
- */
+//===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
-/* Returns: a / b, *rem = a % b  */
+// Returns: a / b, *rem = a % b
 
 COMPILER_RT_ABI si_int __divmodsi4(si_int a, si_int b, si_int *rem) {
   si_int d = __divsi3(a, b);

compiler-rt/lib/builtins/divsc3.c

@@ -1,22 +1,21 @@
-/*===-- divsc3.c - Implement __divsc3 -------------------------------------===
+//===-- divsc3.c - Implement __divsc3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divsc3 for the compiler_rt library.
+// This file implements __divsc3 for the compiler_rt library.
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #define SINGLE_PRECISION
 #include "fp_lib.h"
 #include "int_lib.h"
 #include "int_math.h"
 
-/* Returns: the quotient of (a + ib) / (c + id) */
+// Returns: the quotient of (a + ib) / (c + id)
 
 COMPILER_RT_ABI Fcomplex __divsc3(float __a, float __b, float __c, float __d) {
   int __ilogbw = 0;

compiler-rt/lib/builtins/divsi3.c

@@ -1,34 +1,33 @@
-/* ===-- divsi3.c - Implement __divsi3 -------------------------------------===
+//===-- divsi3.c - Implement __divsi3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divsi3 for the compiler_rt library.
+// This file implements __divsi3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
-/* Returns: a / b */
+// Returns: a / b
 
 COMPILER_RT_ABI si_int __divsi3(si_int a, si_int b) {
   const int bits_in_word_m1 = (int)(sizeof(si_int) * CHAR_BIT) - 1;
-  si_int s_a = a >> bits_in_word_m1; /* s_a = a < 0 ? -1 : 0 */
+  si_int s_a = a >> bits_in_word_m1; // s_a = a < 0 ? -1 : 0
-  si_int s_b = b >> bits_in_word_m1; /* s_b = b < 0 ? -1 : 0 */
+  si_int s_b = b >> bits_in_word_m1; // s_b = b < 0 ? -1 : 0
-  a = (a ^ s_a) - s_a;               /* negate if s_a == -1 */
+  a = (a ^ s_a) - s_a;               // negate if s_a == -1
-  b = (b ^ s_b) - s_b;               /* negate if s_b == -1 */
+  b = (b ^ s_b) - s_b;               // negate if s_b == -1
-  s_a ^= s_b;                        /* sign of quotient */
+  s_a ^= s_b;                        // sign of quotient
-  /*
+  //
-   * On CPUs without unsigned hardware division support,
+  // On CPUs without unsigned hardware division support,
-   *  this calls __udivsi3 (notice the cast to su_int).
+  //  this calls __udivsi3 (notice the cast to su_int).
-   * On CPUs with unsigned hardware division support,
+  // On CPUs with unsigned hardware division support,
-   *  this uses the unsigned division instruction.
+  //  this uses the unsigned division instruction.
-   */
+  //
-  return ((su_int)a / (su_int)b ^ s_a) - s_a; /* negate if s_a == -1 */
+  return ((su_int)a / (su_int)b ^ s_a) - s_a; // negate if s_a == -1
 }
 
 #if defined(__ARM_EABI__)

compiler-rt/lib/builtins/divtc3.c

@@ -1,22 +1,21 @@
-/*===-- divtc3.c - Implement __divtc3 -------------------------------------===
+//===-- divtc3.c - Implement __divtc3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divtc3 for the compiler_rt library.
+// This file implements __divtc3 for the compiler_rt library.
- *
+//
- *===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #define QUAD_PRECISION
 #include "fp_lib.h"
 #include "int_lib.h"
 #include "int_math.h"
 
-/* Returns: the quotient of (a + ib) / (c + id) */
+// Returns: the quotient of (a + ib) / (c + id)
 
 COMPILER_RT_ABI Lcomplex __divtc3(long double __a, long double __b,
                                   long double __c, long double __d) {

compiler-rt/lib/builtins/divti3.c

@@ -1,31 +1,29 @@
-/* ===-- divti3.c - Implement __divti3 -------------------------------------===
+//===-- divti3.c - Implement __divti3 -------------------------------------===//
- *
+//
- * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
- * See https://llvm.org/LICENSE.txt for license information.
+// See https://llvm.org/LICENSE.txt for license information.
- * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- *
+//
- * This file implements __divti3 for the compiler_rt library.
+// This file implements __divti3 for the compiler_rt library.
- *
+//
- * ===----------------------------------------------------------------------===
+//===----------------------------------------------------------------------===//
- */
 
 #include "int_lib.h"
 
 #ifdef CRT_HAS_128BIT
 
-/* Returns: a / b */
+// Returns: a / b
 
 COMPILER_RT_ABI ti_int __divti3(ti_int a, ti_int b) {
   const int bits_in_tword_m1 = (int)(sizeof(ti_int) * CHAR_BIT) - 1;
-  ti_int s_a = a >> bits_in_tword_m1; /* s_a = a < 0 ? -1 : 0 */
+  ti_int s_a = a >> bits_in_tword_m1;                   // s_a = a < 0 ? -1 : 0
-  ti_int s_b = b >> bits_in_tword_m1; /* s_b = b < 0 ? -1 : 0 */
+  ti_int s_b = b >> bits_in_tword_m1;                   // s_b = b < 0 ? -1 : 0
-  a = (a ^ s_a) - s_a;                /* negate if s_a == -1 */
+  a = (a ^ s_a) - s_a;                                  // negate if s_a == -1
-  b = (b ^ s_b) - s_b;                /* negate if s_b == -1 */
+  b = (b ^ s_b) - s_b;                                  // negate if s_b == -1
-  s_a ^= s_b;                         /* sign of quotient */
+  s_a ^= s_b;                                           // sign of quotient
-  return (__udivmodti4(a, b, (tu_int *)0) ^ s_a) -
+  return (__udivmodti4(a, b, (tu_int *)0) ^ s_a) - s_a; // negate if s_a == -1
-         s_a; /* negate if s_a == -1 */
 }
 
-#endif /* CRT_HAS_128BIT */
+#endif // CRT_HAS_128BIT