From 0b5db55b963a69d45f5712935c60d1ec8e69a511 Mon Sep 17 00:00:00 2001
From: Michael Zuckerman <Michael.zuckerman@intel.com>
Date: Fri, 29 Sep 2017 12:45:54 +0000
Subject: [PATCH] Small modification <NFC>

Change-Id: I360abccee12cae29bd2ac4f8399c9ecc92eb7f13
llvm-svn: 314510
---
 llvm/lib/Target/X86/X86InterleavedAccess.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
index ff7244f62194..e93ec274ee90 100644
--- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp
+++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
@@ -536,7 +536,7 @@ static void group2Shuffle(MVT VT, SmallVectorImpl<uint32_t> &Mask,
 // By computing the shuffle on a sequence of 16 elements(one lane) and add the
 // correct offset. We are creating a vpsuffed + blend sequence between two
 // shuffles.
-static void genShuffleBland(MVT VT, SmallVectorImpl<uint32_t> &Mask,
+static void genShuffleBland(MVT VT, ArrayRef<uint32_t> Mask,
                             SmallVectorImpl<uint32_t> &Out, int LowOffset,
                             int HighOffset) {
   assert(VT.getSizeInBits() == 256 &&