forked from OSchip/llvm-project
parent
fa56bca781
commit
0b5119315b
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@ -3148,9 +3148,6 @@ def BCCZi64 : PseudoInst<(outs),
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// Conditional moves
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// FIXME: should be able to write a pattern for ARMcmov, but can't use
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// a two-value operand where a dag node expects two operands. :(
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// FIXME: These should all be pseudo-instructions that get expanded to
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// the normal MOV instructions. That would fix the dependency on
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// special casing them in tblgen.
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let neverHasSideEffects = 1 in {
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def MOVCCr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$false, GPR:$Rm, pred:$p),
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Size4Bytes, IIC_iCMOVr,
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