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[NVPTX] Associate a minimum PTX version for each SM architecture 

When a new SM architecture is introduced, it is only supported by the
current PTX version and later.  Make sure we are using at least the
minimum PTX version for the target architecture.

This also removes support for PTX ISA < 3.2.

llvm-svn: 233583
This commit is contained in:
Justin Holewinski 2015-03-30 19:30:55 +00:00
parent 9dffcd04f7
commit 0afca26e90
10 changed files with 18 additions and 21 deletions
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14
llvm/lib/Target/NVPTX/NVPTX.td
View File

@ -46,10 +46,6 @@ def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
"Target SM 5.3">;
// PTX Versions
def PTX30 : SubtargetFeature<"ptx30", "PTXVersion", "30",
"Use PTX version 3.0">;
def PTX31 : SubtargetFeature<"ptx31", "PTXVersion", "31",
"Use PTX version 3.1">;
def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
"Use PTX version 3.2">;
def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
@ -69,12 +65,12 @@ class Proc<string Name, list<SubtargetFeature> Features>
def : Proc<"sm_20", [SM20]>;
def : Proc<"sm_21", [SM21]>;
def : Proc<"sm_30", [SM30]>;
def : Proc<"sm_32", [SM32]>;
def : Proc<"sm_32", [SM32, PTX40]>;
def : Proc<"sm_35", [SM35]>;
def : Proc<"sm_37", [SM37]>;
def : Proc<"sm_50", [SM50]>;
def : Proc<"sm_52", [SM52]>;
def : Proc<"sm_53", [SM53]>;
def : Proc<"sm_37", [SM37, PTX41]>;
def : Proc<"sm_50", [SM50, PTX40]>;
def : Proc<"sm_52", [SM52, PTX41]>;
def : Proc<"sm_53", [SM53, PTX42]>;
def NVPTXInstrInfo : InstrInfo {

6
llvm/test/CodeGen/NVPTX/ptx-version-30.ll
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@ -1,6 +0,0 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
; CHECK: .version 3.0

6
llvm/test/CodeGen/NVPTX/ptx-version-31.ll
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@ -1,6 +0,0 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
; CHECK: .version 3.1

1
llvm/test/CodeGen/NVPTX/sm-version-30.ll
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@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
; CHECK: .version 3.2
; CHECK: .target sm_30

1
llvm/test/CodeGen/NVPTX/sm-version-32.ll
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@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_32 | FileCheck %s
; CHECK: .version 4.0
; CHECK: .target sm_32

1
llvm/test/CodeGen/NVPTX/sm-version-35.ll
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@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s
; CHECK: .version 3.2
; CHECK: .target sm_35

1
llvm/test/CodeGen/NVPTX/sm-version-37.ll
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@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_37 | FileCheck %s
; CHECK: .version 4.1
; CHECK: .target sm_37

7
llvm/test/CodeGen/NVPTX/sm-version-50.ll Normal file
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@ -0,0 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_50 | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_50 | FileCheck %s
; CHECK: .version 4.0
; CHECK: .target sm_50

1
llvm/test/CodeGen/NVPTX/sm-version-52.ll
View File

@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_52 | FileCheck %s
; CHECK: .version 4.1
; CHECK: .target sm_52

1
llvm/test/CodeGen/NVPTX/sm-version-53.ll
View File

@ -2,5 +2,6 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_53 | FileCheck %s
; CHECK: .version 4.2
; CHECK: .target sm_53