maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[CodeGen] Take a MachineMemOperand::Flags in MachineFunction::getMachineMemOperand. 

Summary:
Previously we took an unsigned.

Hooray for type-safety.

Reviewers: chandlerc

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D22282

llvm-svn: 275591
This commit is contained in:
Justin Lebar 2016-07-15 18:26:59 +00:00
parent d798c05526
commit 0af80cd6f0
19 changed files with 45 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
llvm/include/llvm/CodeGen/MachineFunction.h
View File

@ -21,6 +21,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/ilist.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Metadata.h"
#include "llvm/Support/Allocator.h"
@ -530,8 +531,8 @@ public:
/// MachineMemOperands are owned by the MachineFunction and need not be
/// explicitly deallocated.
MachineMemOperand *getMachineMemOperand(MachinePointerInfo PtrInfo,
unsigned f, uint64_t s,
unsigned base_alignment,
MachineMemOperand::Flags f,
uint64_t s, unsigned base_alignment,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr);

8
llvm/lib/CodeGen/MIRParser/MIParser.cpp
View File

@ -165,7 +165,7 @@ public:
bool parseAlignment(unsigned &Alignment);
bool parseOperandsOffset(MachineOperand &Op);
bool parseIRValue(const Value *&V);
bool parseMemoryOperandFlag(unsigned &Flags);
bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
bool parseMachinePointerInfo(MachinePointerInfo &Dest);
bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
@ -1652,8 +1652,8 @@ bool MIParser::getUint64(uint64_t &Result) {
return false;
}
bool MIParser::parseMemoryOperandFlag(unsigned &Flags) {
const unsigned OldFlags = Flags;
bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
const auto OldFlags = Flags;
switch (Token.kind()) {
case MIToken::kw_volatile:
Flags |= MachineMemOperand::MOVolatile;
@ -1769,7 +1769,7 @@ bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
if (expectAndConsume(MIToken::lparen))
return true;
unsigned Flags = 0;
MachineMemOperand::Flags Flags = MachineMemOperand::MONone;
while (Token.isMemoryOperandFlag()) {
if (parseMemoryOperandFlag(Flags))
return true;

13
llvm/lib/CodeGen/MachineFunction.cpp
View File

@ -294,16 +294,11 @@ MachineFunction::DeleteMachineBasicBlock(MachineBasicBlock *MBB) {
BasicBlockRecycler.Deallocate(Allocator, MBB);
}
MachineMemOperand *
MachineFunction::getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f,
uint64_t s, unsigned base_alignment,
const AAMDNodes &AAInfo,
const MDNode *Ranges) {
// FIXME: Get rid of this static_cast and make getMachineOperand take a
// MachineMemOperand::Flags param.
MachineMemOperand *MachineFunction::getMachineMemOperand(
MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s,
unsigned base_alignment, const AAMDNodes &AAInfo, const MDNode *Ranges) {
return new (Allocator)
MachineMemOperand(PtrInfo, static_cast<MachineMemOperand::Flags>(f), s,
base_alignment, AAInfo, Ranges);
MachineMemOperand(PtrInfo, f, s, base_alignment, AAInfo, Ranges);
}
MachineMemOperand *

2
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -2161,7 +2161,7 @@ FastISel::createMachineMemOperandFor(const Instruction *I) const {
const Value *Ptr;
Type *ValTy;
unsigned Alignment;
unsigned Flags;
MachineMemOperand::Flags Flags;
bool IsVolatile;
if (const auto *LI = dyn_cast<LoadInst>(I)) {

16
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -4845,10 +4845,8 @@ SDValue SelectionDAG::getAtomicCmpSwap(
// FIXME: Volatile isn't really correct; we should keep track of atomic
// orderings in the memoperand.
unsigned Flags = MachineMemOperand::MOVolatile;
Flags |= MachineMemOperand::MOLoad;
Flags |= MachineMemOperand::MOStore;
auto Flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad |
MachineMemOperand::MOStore;
MachineMemOperand *MMO =
MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
@ -4887,7 +4885,7 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
// chained as such.
// FIXME: Volatile isn't really correct; we should keep track of atomic
// orderings in the memoperand.
unsigned Flags = MachineMemOperand::MOVolatile;
auto Flags = MachineMemOperand::MOVolatile;
if (Opcode != ISD::ATOMIC_STORE)
Flags |= MachineMemOperand::MOLoad;
if (Opcode != ISD::ATOMIC_LOAD)
@ -4958,7 +4956,7 @@ SDValue SelectionDAG::getMemIntrinsicNode(
Align = getEVTAlignment(MemVT);
MachineFunction &MF = getMachineFunction();
unsigned Flags = 0;
auto Flags = MachineMemOperand::MONone;
if (WriteMem)
Flags |= MachineMemOperand::MOStore;
if (ReadMem)
@ -5061,7 +5059,7 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
if (Alignment == 0) // Ensure that codegen never sees alignment 0
Alignment = getEVTAlignment(VT);
unsigned Flags = MachineMemOperand::MOLoad;
auto Flags = MachineMemOperand::MOLoad;
if (isVolatile)
Flags |= MachineMemOperand::MOVolatile;
if (isNonTemporal)
@ -5186,7 +5184,7 @@ SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
if (Alignment == 0) // Ensure that codegen never sees alignment 0
Alignment = getEVTAlignment(Val.getValueType());
unsigned Flags = MachineMemOperand::MOStore;
auto Flags = MachineMemOperand::MOStore;
if (isVolatile)
Flags |= MachineMemOperand::MOVolatile;
if (isNonTemporal)
@ -5242,7 +5240,7 @@ SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
if (Alignment == 0) // Ensure that codegen never sees alignment 0
Alignment = getEVTAlignment(SVT);
unsigned Flags = MachineMemOperand::MOStore;
auto Flags = MachineMemOperand::MOStore;
if (isVolatile)
Flags |= MachineMemOperand::MOVolatile;
if (isNonTemporal)

2
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -2013,7 +2013,7 @@ static SDValue getLoadStackGuard(SelectionDAG &DAG, const SDLoc &DL,
if (Global) {
MachinePointerInfo MPInfo(Global);
MachineInstr::mmo_iterator MemRefs = MF.allocateMemRefsArray(1);
unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
*MemRefs = MF.getMachineMemOperand(MPInfo, Flags, PtrTy.getSizeInBits() / 8,
DAG.getEVTAlignment(PtrTy));
Node->setMemRefs(MemRefs, MemRefs + 1);

2
llvm/lib/CodeGen/TargetInstrInfo.cpp
View File

@ -497,7 +497,7 @@ static MachineInstr *foldPatchpoint(MachineFunction &MF, MachineInstr &MI,
MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineInstr &MI,
ArrayRef<unsigned> Ops, int FI,
LiveIntervals *LIS) const {
unsigned Flags = 0;
auto Flags = MachineMemOperand::MONone;
for (unsigned i = 0, e = Ops.size(); i != e; ++i)
if (MI.getOperand(Ops[i]).isDef())
Flags |= MachineMemOperand::MOStore;

2
llvm/lib/CodeGen/TargetLoweringBase.cpp
View File

@ -1234,7 +1234,7 @@ TargetLoweringBase::emitPatchPoint(MachineInstr &InitialMI,
// Add a new memory operand for this FI.
assert(MFI.getObjectOffset(FI) != -1);
unsigned Flags = MachineMemOperand::MOLoad;
auto Flags = MachineMemOperand::MOLoad;
if (MI->getOpcode() == TargetOpcode::STATEPOINT) {
Flags |= MachineMemOperand::MOStore;
Flags |= MachineMemOperand::MOVolatile;

6
llvm/lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -143,8 +143,8 @@ private:
bool computeCallAddress(const Value *V, Address &Addr);
bool simplifyAddress(Address &Addr, MVT VT);
void addLoadStoreOperands(Address &Addr, const MachineInstrBuilder &MIB,
unsigned Flags, unsigned ScaleFactor,
MachineMemOperand *MMO);
MachineMemOperand::Flags Flags,
unsigned ScaleFactor, MachineMemOperand *MMO);
bool isMemCpySmall(uint64_t Len, unsigned Alignment);
bool tryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len,
unsigned Alignment);
@ -1040,7 +1040,7 @@ bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
void AArch64FastISel::addLoadStoreOperands(Address &Addr,
const MachineInstrBuilder &MIB,
unsigned Flags,
MachineMemOperand::Flags Flags,
unsigned ScaleFactor,
MachineMemOperand *MMO) {
int64_t Offset = Addr.getOffset() / ScaleFactor;

4
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -4132,9 +4132,9 @@ void ARMBaseInstrInfo::expandLoadStackGuardBase(MachineBasicBlock::iterator MI,
if (Subtarget.isGVIndirectSymbol(GV)) {
MIB = BuildMI(MBB, MI, DL, get(LoadOpc), Reg);
MIB.addReg(Reg, RegState::Kill).addImm(0);
unsigned Flag = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
MachinePointerInfo::getGOT(*MBB.getParent()), Flag, 4, 4);
MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 4, 4);
MIB.addMemOperand(MMO);
AddDefaultPred(MIB);
}

5
llvm/lib/Target/ARM/ARMFastISel.cpp
View File

@ -209,7 +209,7 @@ class ARMFastISel final : public FastISel {
const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
void AddLoadStoreOperands(MVT VT, Address &Addr,
const MachineInstrBuilder &MIB,
unsigned Flags, bool useAM3);
MachineMemOperand::Flags Flags, bool useAM3);
};
} // end anonymous namespace
@ -873,7 +873,8 @@ void ARMFastISel::ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3) {
void ARMFastISel::AddLoadStoreOperands(MVT VT, Address &Addr,
const MachineInstrBuilder &MIB,
unsigned Flags, bool useAM3) {
MachineMemOperand::Flags Flags,
bool useAM3) {
// addrmode5 output depends on the selection dag addressing dividing the
// offset by 4 that it then later multiplies. Do this here as well.
if (VT.SimpleTy == MVT::f32 || VT.SimpleTy == MVT::f64)

4
llvm/lib/Target/ARM/ARMInstrInfo.cpp
View File

@ -123,9 +123,9 @@ void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI) const {
MIB = BuildMI(MBB, MI, DL, get(ARM::MOV_ga_pcrel_ldr), Reg)
.addGlobalAddress(GV, 0, ARMII::MO_NONLAZY);
unsigned Flag = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
MachinePointerInfo::getGOT(*MBB.getParent()), Flag, 4, 4);
MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 4, 4);
MIB.addMemOperand(MMO);
MIB = BuildMI(MBB, MI, DL, get(ARM::LDRi12), Reg);
MIB.addReg(Reg, RegState::Kill).addImm(0);

2
llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
View File

@ -642,7 +642,7 @@ void HexagonSplitDoubleRegs::splitMemRef(MachineInstr *MI,
MachineFunction &MF = *B.getParent();
for (auto &MO : MI->memoperands()) {
const MachinePointerInfo &Ptr = MO->getPointerInfo();
unsigned F = MO->getFlags();
MachineMemOperand::Flags F = MO->getFlags();
int A = MO->getAlignment();
auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4/*size*/, A);

7
llvm/lib/Target/Mips/MipsInstrInfo.cpp
View File

@ -54,14 +54,15 @@ insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
BuildMI(MBB, MI, DL, get(Mips::NOP));
}
MachineMemOperand *MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI,
unsigned Flag) const {
MachineMemOperand *
MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI,
MachineMemOperand::Flags Flags) const {
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
unsigned Align = MFI.getObjectAlignment(FI);
return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI),
Flag, MFI.getObjectSize(FI), Align);
Flags, MFI.getObjectSize(FI), Align);
}
//===----------------------------------------------------------------------===//

2
llvm/lib/Target/Mips/MipsInstrInfo.h
View File

@ -137,7 +137,7 @@ protected:
bool isZeroImm(const MachineOperand &op) const;
MachineMemOperand *GetMemOperand(MachineBasicBlock &MBB, int FI,
unsigned Flag) const;
MachineMemOperand::Flags Flags) const;
private:
virtual unsigned getAnalyzableBrOpc(unsigned Opc) const = 0;

2
llvm/lib/Target/SystemZ/SystemZInstrBuilder.h
View File

@ -29,7 +29,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI) {
MachineFunction &MF = *MI->getParent()->getParent();
MachineFrameInfo *MFFrame = MF.getFrameInfo();
const MCInstrDesc &MCID = MI->getDesc();
unsigned Flags = 0;
auto Flags = MachineMemOperand::MONone;
if (MCID.mayLoad())
Flags |= MachineMemOperand::MOLoad;
if (MCID.mayStore())

2
llvm/lib/Target/X86/X86InstrBuilder.h
View File

@ -179,7 +179,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
MachineFunction &MF = *MI->getParent()->getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
const MCInstrDesc &MCID = MI->getDesc();
unsigned Flags = 0;
auto Flags = MachineMemOperand::MONone;
if (MCID.mayLoad())
Flags |= MachineMemOperand::MOLoad;
if (MCID.mayStore())

4
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -5498,9 +5498,9 @@ static void expandLoadStackGuard(MachineInstrBuilder &MIB,
unsigned Reg = MIB->getOperand(0).getReg();
const GlobalValue *GV =
cast<GlobalValue>((*MIB->memoperands_begin())->getValue());
unsigned Flag = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant;
MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
MachinePointerInfo::getGOT(*MBB.getParent()), Flag, 8, 8);
MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 8, 8);
MachineBasicBlock::iterator I = MIB.getInstr();
BuildMI(MBB, I, DL, TII.get(X86::MOV64rm), Reg).addReg(X86::RIP).addImm(1)

5
llvm/lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -172,8 +172,9 @@ static void GetEHSpillList(SmallVectorImpl<StackSlotInfo> &SpillList,
std::sort(SpillList.begin(), SpillList.end(), CompareSSIOffset);
}
static MachineMemOperand *
getFrameIndexMMO(MachineBasicBlock &MBB, int FrameIndex, unsigned flags) {
static MachineMemOperand *getFrameIndexMMO(MachineBasicBlock &MBB,
int FrameIndex,
MachineMemOperand::Flags flags) {
MachineFunction *MF = MBB.getParent();
const MachineFrameInfo &MFI = *MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand(