forked from OSchip/llvm-project
LoopVectorize fix: LoopInfo must be valid when invoking utils like SCEVExpander.
In general, one should always complete CFG modifications first, update CFG-based analyses, like Dominatores and LoopInfo, then generate instruction sequences. LoopVectorizer was creating a new loop, calling SCEVExpander to generate checks, then updating LoopInfo. I just changed the order. llvm-svn: 186241
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07025fe5e9
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@ -1476,6 +1476,22 @@ InnerLoopVectorizer::createEmptyLoop(LoopVectorizationLegality *Legal) {
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BasicBlock *ScalarPH =
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MiddleBlock->splitBasicBlock(MiddleBlock->getTerminator(), "scalar.ph");
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// Create and register the new vector loop.
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Loop* Lp = new Loop();
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Loop *ParentLoop = OrigLoop->getParentLoop();
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// Insert the new loop into the loop nest and register the new basic blocks
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// before calling any utilities such as SCEV that require valid LoopInfo.
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if (ParentLoop) {
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ParentLoop->addChildLoop(Lp);
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ParentLoop->addBasicBlockToLoop(ScalarPH, LI->getBase());
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ParentLoop->addBasicBlockToLoop(VectorPH, LI->getBase());
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ParentLoop->addBasicBlockToLoop(MiddleBlock, LI->getBase());
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} else {
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LI->addTopLevelLoop(Lp);
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}
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Lp->addBasicBlockToLoop(VecBody, LI->getBase());
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// Use this IR builder to create the loop instructions (Phi, Br, Cmp)
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// inside the loop.
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Builder.SetInsertPoint(VecBody->getFirstInsertionPt());
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@ -1530,6 +1546,8 @@ InnerLoopVectorizer::createEmptyLoop(LoopVectorizationLegality *Legal) {
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// Create a new block containing the memory check.
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BasicBlock *CheckBlock = BypassBlock->splitBasicBlock(MemRuntimeCheck,
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"vector.memcheck");
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if (ParentLoop)
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ParentLoop->addBasicBlockToLoop(CheckBlock, LI->getBase());
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LoopBypassBlocks.push_back(CheckBlock);
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// Replace the branch into the memory check block with a conditional branch
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@ -1697,24 +1715,6 @@ InnerLoopVectorizer::createEmptyLoop(LoopVectorizationLegality *Legal) {
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// Get ready to start creating new instructions into the vectorized body.
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Builder.SetInsertPoint(VecBody->getFirstInsertionPt());
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// Create and register the new vector loop.
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Loop* Lp = new Loop();
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Loop *ParentLoop = OrigLoop->getParentLoop();
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// Insert the new loop into the loop nest and register the new basic blocks.
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if (ParentLoop) {
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ParentLoop->addChildLoop(Lp);
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for (unsigned I = 1, E = LoopBypassBlocks.size(); I != E; ++I)
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ParentLoop->addBasicBlockToLoop(LoopBypassBlocks[I], LI->getBase());
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ParentLoop->addBasicBlockToLoop(ScalarPH, LI->getBase());
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ParentLoop->addBasicBlockToLoop(VectorPH, LI->getBase());
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ParentLoop->addBasicBlockToLoop(MiddleBlock, LI->getBase());
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} else {
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LI->addTopLevelLoop(Lp);
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}
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Lp->addBasicBlockToLoop(VecBody, LI->getBase());
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// Save the state.
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LoopVectorPreHeader = VectorPH;
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LoopScalarPreHeader = ScalarPH;
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@ -0,0 +1,113 @@
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; RUN: opt < %s -loop-vectorize -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx"
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@b = common global i32 0, align 4
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@f = common global i32 0, align 4
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@a = common global i32 0, align 4
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@d = common global i32* null, align 8
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@e = common global i32* null, align 8
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@c = common global i32 0, align 4
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; CHECK-LABEL: @fn1
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; CHECK: vector.body
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define void @fn1() #0 {
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entry:
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br label %for.cond
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for.cond: ; preds = %for.cond, %entry
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%i.0 = phi i32 [ undef, %entry ], [ %inc, %for.cond ]
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%cmp = icmp slt i32 %i.0, 0
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%call = tail call i32 @fn2(double fadd (double fsub (double undef, double undef), double 1.000000e+00)) #2
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%inc = add nsw i32 %i.0, 1
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br i1 %cmp, label %for.cond, label %for.cond4.preheader
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for.cond4.preheader: ; preds = %for.cond
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%call.lcssa = phi i32 [ %call, %for.cond ]
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%cmp514 = icmp sgt i32 %call.lcssa, 0
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br i1 %cmp514, label %for.cond7.preheader.lr.ph, label %for.end26
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for.cond7.preheader.lr.ph: ; preds = %for.cond4.preheader
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%0 = load i32** @e, align 8, !tbaa !0
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br label %for.cond7.preheader
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for.cond7.preheader: ; preds = %for.cond7.preheader.lr.ph, %for.inc23
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%y.017 = phi i32 [ 0, %for.cond7.preheader.lr.ph ], [ %inc24, %for.inc23 ]
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%i.116 = phi i32 [ 0, %for.cond7.preheader.lr.ph ], [ %i.2.lcssa, %for.inc23 ]
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%n.015 = phi i32 [ undef, %for.cond7.preheader.lr.ph ], [ %inc25, %for.inc23 ]
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%1 = load i32* @b, align 4, !tbaa !3
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%tobool11 = icmp eq i32 %1, 0
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br i1 %tobool11, label %for.inc23, label %for.body8.lr.ph
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for.body8.lr.ph: ; preds = %for.cond7.preheader
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%add9 = add i32 %n.015, 1
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br label %for.body8
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for.body8: ; preds = %for.body8.lr.ph, %for.inc19
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%indvars.iv19 = phi i64 [ 0, %for.body8.lr.ph ], [ %indvars.iv.next20, %for.inc19 ]
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%i.213 = phi i32 [ %i.116, %for.body8.lr.ph ], [ 0, %for.inc19 ]
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%2 = trunc i64 %indvars.iv19 to i32
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%add10 = add i32 %add9, %2
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store i32 %add10, i32* @f, align 4, !tbaa !3
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%idx.ext = sext i32 %add10 to i64
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%add.ptr = getelementptr inbounds i32* @a, i64 %idx.ext
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%tobool129 = icmp eq i32 %i.213, 0
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br i1 %tobool129, label %for.inc19, label %for.body13.lr.ph
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for.body13.lr.ph: ; preds = %for.body8
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%3 = sext i32 %i.213 to i64
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br label %for.body13
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for.body13: ; preds = %for.body13.lr.ph, %for.body13
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%indvars.iv = phi i64 [ %3, %for.body13.lr.ph ], [ %indvars.iv.next, %for.body13 ]
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%add.ptr.sum = add i64 %idx.ext, %indvars.iv
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%arrayidx = getelementptr inbounds i32* @a, i64 %add.ptr.sum
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%4 = load i32* %arrayidx, align 4, !tbaa !3
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%arrayidx15 = getelementptr inbounds i32* %0, i64 %indvars.iv
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store i32 %4, i32* %arrayidx15, align 4, !tbaa !3
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%indvars.iv.next = add i64 %indvars.iv, 1
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%5 = trunc i64 %indvars.iv.next to i32
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%tobool12 = icmp eq i32 %5, 0
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br i1 %tobool12, label %for.cond11.for.inc19_crit_edge, label %for.body13
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for.cond11.for.inc19_crit_edge: ; preds = %for.body13
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br label %for.inc19
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for.inc19: ; preds = %for.cond11.for.inc19_crit_edge, %for.body8
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%6 = load i32* @c, align 4, !tbaa !3
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%inc20 = add nsw i32 %6, 1
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store i32 %inc20, i32* @c, align 4, !tbaa !3
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%indvars.iv.next20 = add i64 %indvars.iv19, 1
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%7 = load i32* @b, align 4, !tbaa !3
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%tobool = icmp eq i32 %7, 0
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br i1 %tobool, label %for.cond7.for.inc23_crit_edge, label %for.body8
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for.cond7.for.inc23_crit_edge: ; preds = %for.inc19
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%add.ptr.lcssa = phi i32* [ %add.ptr, %for.inc19 ]
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store i32* %add.ptr.lcssa, i32** @d, align 8, !tbaa !0
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br label %for.inc23
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for.inc23: ; preds = %for.cond7.for.inc23_crit_edge, %for.cond7.preheader
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%i.2.lcssa = phi i32 [ 0, %for.cond7.for.inc23_crit_edge ], [ %i.116, %for.cond7.preheader ]
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%inc24 = add nsw i32 %y.017, 1
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%inc25 = add nsw i32 %n.015, 1
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%exitcond = icmp ne i32 %inc24, %call.lcssa
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br i1 %exitcond, label %for.cond7.preheader, label %for.cond4.for.end26_crit_edge
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for.cond4.for.end26_crit_edge: ; preds = %for.inc23
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br label %for.end26
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for.end26: ; preds = %for.cond4.for.end26_crit_edge, %for.cond4.preheader
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ret void
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}
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declare i32 @fn2(double) #1
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attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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!3 = metadata !{metadata !"double", metadata !1}
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!4 = metadata !{metadata !"any pointer", metadata !1}
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