forked from OSchip/llvm-project
[StackMaps] Mark in CallLoweringInfo when lowering a patchpoint
While, generally speaking, the process of lowering arguments for a patchpoint is the same as lowering a regular indirect call, on some targets it may not be exactly the same. Targets may not, for example, want to add additional register dependencies that apply only to making cross-DSO calls through linker stubs, may not want to load additional registers out of function descriptors, and may not want to add additional side-effect-causing instructions that cannot be removed later with the call itself being generated. The PowerPC target will use this in a future commit (for all of the reasons stated above). llvm-svn: 225806
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@ -76,6 +76,8 @@ public:
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unsigned ResultReg;
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unsigned NumResultRegs;
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bool IsPatchPoint;
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SmallVector<Value *, 16> OutVals;
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SmallVector<ISD::ArgFlagsTy, 16> OutFlags;
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SmallVector<unsigned, 16> OutRegs;
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@ -87,7 +89,7 @@ public:
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IsInReg(false), DoesNotReturn(false), IsReturnValueUsed(true),
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IsTailCall(false), NumFixedArgs(-1), CallConv(CallingConv::C),
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Callee(nullptr), SymName(nullptr), CS(nullptr), Call(nullptr),
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ResultReg(0), NumResultRegs(0) {}
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ResultReg(0), NumResultRegs(0), IsPatchPoint(false) {}
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CallLoweringInfo &setCallee(Type *ResultTy, FunctionType *FuncTy,
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const Value *Target, ArgListTy &&ArgsList,
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@ -162,6 +164,11 @@ public:
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return *this;
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}
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CallLoweringInfo &setIsPatchPoint(bool Value = true) {
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IsPatchPoint = Value;
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return *this;
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}
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ArgListTy &getArgs() { return Args; }
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void clearOuts() {
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@ -2299,6 +2299,7 @@ public:
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SelectionDAG &DAG;
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SDLoc DL;
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ImmutableCallSite *CS;
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bool IsPatchPoint;
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SmallVector<ISD::OutputArg, 32> Outs;
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SmallVector<SDValue, 32> OutVals;
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SmallVector<ISD::InputArg, 32> Ins;
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@ -2307,7 +2308,7 @@ public:
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: RetTy(nullptr), RetSExt(false), RetZExt(false), IsVarArg(false),
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IsInReg(false), DoesNotReturn(false), IsReturnValueUsed(true),
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IsTailCall(false), NumFixedArgs(-1), CallConv(CallingConv::C),
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DAG(DAG), CS(nullptr) {}
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DAG(DAG), CS(nullptr), IsPatchPoint(false) {}
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CallLoweringInfo &setDebugLoc(SDLoc dl) {
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DL = dl;
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@ -2389,6 +2390,11 @@ public:
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return *this;
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}
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CallLoweringInfo &setIsPatchPoint(bool Value = true) {
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IsPatchPoint = Value;
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return *this;
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}
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ArgListTy &getArgs() {
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return Args;
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}
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@ -728,6 +728,7 @@ bool FastISel::selectPatchpoint(const CallInst *I) {
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// For AnyRegCC the arguments are lowered later on manually.
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unsigned NumCallArgs = IsAnyRegCC ? 0 : NumArgs;
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CallLoweringInfo CLI;
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CLI.setIsPatchPoint();
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if (!lowerCallOperands(I, NumMetaOpers, NumCallArgs, Callee, IsAnyRegCC, CLI))
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return false;
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@ -7023,7 +7023,8 @@ std::pair<SDValue, SDValue>
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SelectionDAGBuilder::lowerCallOperands(ImmutableCallSite CS, unsigned ArgIdx,
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unsigned NumArgs, SDValue Callee,
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bool UseVoidTy,
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MachineBasicBlock *LandingPad) {
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MachineBasicBlock *LandingPad,
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bool IsPatchPoint) {
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TargetLowering::ArgListTy Args;
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Args.reserve(NumArgs);
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@ -7046,7 +7047,7 @@ SelectionDAGBuilder::lowerCallOperands(ImmutableCallSite CS, unsigned ArgIdx,
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(getCurSDLoc()).setChain(getRoot())
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.setCallee(CS.getCallingConv(), retTy, Callee, std::move(Args), NumArgs)
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.setDiscardResult(CS->use_empty());
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.setDiscardResult(CS->use_empty()).setIsPatchPoint(IsPatchPoint);
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return lowerInvokable(CLI, LandingPad);
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}
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@ -7178,7 +7179,7 @@ void SelectionDAGBuilder::visitPatchpoint(ImmutableCallSite CS,
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unsigned NumCallArgs = IsAnyRegCC ? 0 : NumArgs;
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std::pair<SDValue, SDValue> Result =
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lowerCallOperands(CS, NumMetaOpers, NumCallArgs, Callee, IsAnyRegCC,
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LandingPad);
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LandingPad, true);
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SDNode *CallEnd = Result.second.getNode();
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if (HasDef && (CallEnd->getOpcode() == ISD::CopyFromReg))
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@ -653,7 +653,8 @@ public:
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unsigned NumArgs,
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SDValue Callee,
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bool UseVoidTy = false,
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MachineBasicBlock *LandingPad = nullptr);
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MachineBasicBlock *LandingPad = nullptr,
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bool IsPatchPoint = false);
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/// UpdateSplitBlock - When an MBB was split during scheduling, update the
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/// references that need to refer to the last resulting block.
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