forked from OSchip/llvm-project
[X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm.
Prep work for PR40203 llvm-svn: 356249
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@ -36527,11 +36527,22 @@ static SDValue combineVectorShiftVar(SDNode *N, SelectionDAG &DAG,
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X86ISD::VSRL == N->getOpcode()) &&
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"Unexpected shift opcode");
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EVT VT = N->getValueType(0);
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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// Shift zero -> zero.
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if (ISD::isBuildVectorAllZeros(N->getOperand(0).getNode()))
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if (ISD::isBuildVectorAllZeros(N0.getNode()))
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return DAG.getConstant(0, SDLoc(N), VT);
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// Detect constant shift amounts.
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APInt UndefElts;
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SmallVector<APInt, 32> EltBits;
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if (getTargetConstantBitsFromNode(N1, 64, UndefElts, EltBits, true, false)) {
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unsigned X86Opc = getTargetVShiftUniformOpcode(N->getOpcode(), false);
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return getTargetVShiftByConstNode(X86Opc, SDLoc(N), VT.getSimpleVT(), N0,
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EltBits[0].getZExtValue(), DAG);
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}
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APInt KnownUndef, KnownZero;
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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APInt DemandedElts = APInt::getAllOnesValue(VT.getVectorNumElements());
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@ -5,16 +5,12 @@
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define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
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; X32-LABEL: t1:
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; X32: # %bb.0:
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; X32-NEXT: movl $14, %eax
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; X32-NEXT: movd %eax, %xmm1
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; X32-NEXT: psrlw %xmm1, %xmm0
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; X32-NEXT: psrlw $14, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: t1:
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; X64: # %bb.0:
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; X64-NEXT: movl $14, %eax
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; X64-NEXT: movd %eax, %xmm1
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; X64-NEXT: psrlw %xmm1, %xmm0
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; X64-NEXT: psrlw $14, %xmm0
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; X64-NEXT: retq
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%tmp1 = bitcast <2 x i64> %b1 to <8 x i16>
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%tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
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@ -618,37 +618,28 @@ define void @test_sdiv_pow2_v2i32(<2 x i32>* %x, <2 x i32>* %y) nounwind {
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
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; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X86-NEXT: psrad $31, %xmm0
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; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]
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; X86-NEXT: movdqa %xmm1, %xmm0
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; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; X86-NEXT: movdqa {{.*#+}} xmm2 = [31,0,31,0]
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; X86-NEXT: movdqa {{.*#+}} xmm3 = [0,2147483648,0,2147483648]
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; X86-NEXT: movdqa %xmm3, %xmm4
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; X86-NEXT: psrlq %xmm2, %xmm4
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; X86-NEXT: movl $31, %ecx
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; X86-NEXT: movd %ecx, %xmm5
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; X86-NEXT: psrlq %xmm5, %xmm3
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; X86-NEXT: movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1]
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; X86-NEXT: movdqa %xmm0, %xmm4
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; X86-NEXT: psrlq %xmm2, %xmm4
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; X86-NEXT: psrlq %xmm5, %xmm0
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; X86-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
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; X86-NEXT: xorpd %xmm3, %xmm0
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; X86-NEXT: psubq %xmm3, %xmm0
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: psrlq $29, %xmm0
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; X86-NEXT: paddq %xmm1, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
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; X86-NEXT: psrad $31, %xmm0
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; X86-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; X86-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; X86-NEXT: psrlq $3, %xmm1
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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; X86-NEXT: psrad $31, %xmm1
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; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
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; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; X86-NEXT: psrlq $31, %xmm2
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; X86-NEXT: movsd {{.*#+}} xmm2 = xmm2[0,1]
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; X86-NEXT: movapd {{.*#+}} xmm1 = [2.1219957909652723E-314,2.1219957909652723E-314]
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; X86-NEXT: xorpd %xmm1, %xmm2
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; X86-NEXT: psubq %xmm1, %xmm2
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm2
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; X86-NEXT: psrlq $29, %xmm2
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; X86-NEXT: paddq %xmm0, %xmm2
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; X86-NEXT: psllq $32, %xmm2
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,3,2,3]
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; X86-NEXT: psrad $31, %xmm2
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; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,3,2,3]
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; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X86-NEXT: psrlq $3, %xmm0
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X86-NEXT: movq %xmm0, (%eax)
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; X86-NEXT: retl
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;
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