forked from OSchip/llvm-project
[mlir][linalg] Support generating builders for named op attributes
This commit adds support to generate an additional builder for each named op that has attributes. This gives better experience when creating the named ops. Along the way adds support for i64. Reviewed By: hanchung Differential Revision: https://reviews.llvm.org/D94733
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@ -88,6 +88,7 @@ def test3(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N)) {
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// ODS: F32:$f32_attr,
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// ODS: RankedF32ElementsAttr<[4]>:$fvec_attr,
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// ODS: I32:$i32_attr,
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// ODS: I64:$i64_attr,
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// ODS: RankedI32ElementsAttr<[5, 6]>:$ivec_attr,
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// ODS: OptionalAttr<F32>:$optional_attr
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//
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@ -96,6 +97,7 @@ def test4(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N))
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attr(
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f32_attr: f32,
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i32_attr: i32,
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i64_attr: i64,
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fvec_attr: 4xf32,
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ivec_attr: 5x6xi32,
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array_attr : f32[],
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@ -126,6 +128,7 @@ def test5(I: f32(N, H, W, C), K: f32(F, KH, KW, C)) -> (O: f32(N, H, W, F))
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I(n, h * strides[0] + kh, w * strides[1] + kw, c), K(f, kh, kw, c)));
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}
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// Test documentation
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// ODS-LABEL: def Test6Op
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// ODS: let summary = [{ My magic op. }];
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// ODS-NEXT: let description = [{
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@ -144,3 +147,18 @@ It has one output.
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{
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C(m) = std_addf<k>(std_mulf(A(m, k), B(k)));
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}
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// Test attribute builder
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// ODS-LABEL: def Test7Op
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// ODS: OpBuilderDAG<
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// ODS: (ins "TypeRange":$resultTensorTypes, "ValueRange":$inputs,
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// ODS: "ValueRange":$outputs, "Attribute":$attr_a, "Attribute":$attr_b)
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// ODS: $_state.addAttribute("attr_a", attr_a);
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// ODS: $_state.addAttribute("attr_b", attr_b);
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//
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ods_def<Test7Op>:
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def test7(A: f32(M, K), B: f32(K)) -> (C: f32(M))
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attr(attr_a: f32, attr_b: 4xi32)
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{
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C(m) = std_addf<k>(std_mulf(A(m, k), B(k)));
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}
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@ -1768,6 +1768,7 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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std::string odsType = llvm::StringSwitch<std::string>(elementType)
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.Case("f32", "F32")
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.Case("i32", "I32")
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.Case("i64", "I64")
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.Default("");
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if (odsType.empty()) {
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parser.emitError("unimplemented support for attribute element type: " +
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@ -1811,7 +1812,8 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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let regions = (region AnyRegion:$region);
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let skipDefaultBuilders = 1;
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let builders = [ OpBuilderDAG<
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let builders = [
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OpBuilderDAG<
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(ins "ValueRange":$inputs, "ValueRange":$outputs),
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[{{
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$_state.addOperands(inputs);
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@ -1826,7 +1828,8 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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$_state,
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TypeRange(inputs),
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TypeRange(outputs));
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}]>, OpBuilderDAG<
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}]>,
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OpBuilderDAG<
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(ins "TypeRange":$resultTensorTypes, "ValueRange":$inputs,
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"ValueRange":$outputs),
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[{{
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@ -1843,7 +1846,8 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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$_state,
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TypeRange(inputs),
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TypeRange(outputs));
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}]>, OpBuilderDAG<
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}]>,
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OpBuilderDAG<
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(ins "TypeRange":$resultTensorTypes, "ValueRange":$operands,
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CArg<"ArrayRef<NamedAttribute>", "{{}">:$attributes),
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[{{
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@ -1852,6 +1856,7 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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$_state.addTypes(resultTensorTypes);
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(void)$_state.addRegion();
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}]>
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{5}
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];
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let printer = [{{ return ::printNamedStructuredOp(p, *this); }];
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let parser = [{{ return ::parseNamedStructuredOp<{0}>(parser, result); }];
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@ -1873,8 +1878,8 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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}];
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})FMT";
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// Generate documentation.
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std::string doc;
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if (!docString.empty()) {
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const char *docFmt = R"FMT(
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let summary = [{ {0} }];
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@ -1888,8 +1893,47 @@ void TCParser::printODS(llvm::raw_ostream &os, StringRef cppOpName,
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doc = llvm::formatv(docFmt, summary.trim(), description.trim());
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}
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// Generate an additional builder that has parameters for attributes.
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std::string attrBuilder;
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if (!registeredAttrs.empty()) {
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SmallVector<std::string, 4> attrParams, attrStmts;
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for (const auto &attr : registeredAttrs) {
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llvm::StringRef name = attr.first;
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attrParams.push_back(llvm::formatv("\"Attribute\":${0}", name));
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attrStmts.push_back(
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llvm::formatv("$_state.addAttribute(\"{0}\", {0});", name));
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}
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std::string attrParamsList = llvm::join(attrParams, ", ");
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std::string attrStmtsList = llvm::join(attrStmts, "\n");
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const char *builderFmt = R"FMT(
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, OpBuilderDAG<
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(ins "TypeRange":$resultTensorTypes, "ValueRange":$inputs,
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"ValueRange":$outputs, {1}),
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[{{
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$_state.addOperands(inputs);
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$_state.addOperands(outputs);
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$_state.addTypes(resultTensorTypes);
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$_state.addAttribute(
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"operand_segment_sizes",
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$_builder.getI32VectorAttr({{
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static_cast<int32_t>(inputs.size()),
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static_cast<int32_t>(outputs.size())}));
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buildNamedStructuredOpRegionAndAttributes<{0}>(
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$_builder,
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$_state,
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TypeRange(inputs),
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TypeRange(outputs));
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{2}
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}]>
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)FMT";
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attrBuilder =
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llvm::formatv(builderFmt, cppOpName, attrParamsList, attrStmtsList);
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}
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// Finally put everything together.
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os << llvm::formatv(header, cppOpName, linalgOpName, doc, attrList,
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state.orderedTensorArgs.size());
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state.orderedTensorArgs.size(), attrBuilder);
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}
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/// Print the C++ StructuredOpsInterface impl of `iterator_types`.
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@ -2146,13 +2190,15 @@ TCParser::RegisteredAttr::getValueFn(ArrayRef<uint64_t> indices) const {
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return llvm::formatv("getValue<float>({ {0} })", indexList);
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if (elementType == "i32")
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return llvm::formatv("getValue<int>({ {0} })", indexList);
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if (elementType == "i64")
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return llvm::formatv("getValue<int64_t>({ {0} })", indexList);
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return "";
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}
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if (elementType == "f32")
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return "getValue().convertToFloat()";
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if (elementType == "i32")
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if (elementType == "i32" || elementType == "i64")
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return "getInt()";
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return "";
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}
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