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[X86] Add disassembler support for the 0x0f 0x7f form of movq %mm, %mm. 

llvm-svn: 206447
This commit is contained in:
Craig Topper 2014-04-17 06:33:45 +00:00
parent 98938f1e0a
commit 0a9bf4c0c5
2 changed files with 8 additions and 0 deletions
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5
llvm/lib/Target/X86/X86InstrMMX.td
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@ -254,6 +254,11 @@ let neverHasSideEffects = 1 in
def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src),
"movq\t{$src, $dst|$dst, $src}", [], "movq\t{$src, $dst|$dst, $src}", [],
IIC_MMX_MOVQ_RR>; IIC_MMX_MOVQ_RR>;
let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in {
def MMX_MOVQ64rr_REV : MMXI<0x7F, MRMDestReg, (outs VR64:$dst), (ins VR64:$src),
"movq\t{$src, $dst|$dst, $src}", [],
IIC_MMX_MOVQ_RR>;
}
} // SchedRW } // SchedRW
let SchedRW = [WriteLoad] in { let SchedRW = [WriteLoad] in {

3
llvm/test/MC/Disassembler/X86/x86-32.txt
View File

@ -708,3 +708,6 @@
# CHECK: movl $4294967295, %eax # CHECK: movl $4294967295, %eax
0xc7 0xc0 0xff 0xff 0xff 0xff 0xc7 0xc0 0xff 0xff 0xff 0xff
# CHECK: movq %mm0, %mm1
0x0f 0x7f 0xc1