forked from OSchip/llvm-project
[SystemZ] Bugfix in SystemZAsmParser.cpp.
Let parseRegister() allow RegFP Group if expecting RegV Group, since the %f register prefix yields the FP group even while used with vector instructions. Reviewed by Ulrich Weigand. llvm-svn: 249810
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@ -533,14 +533,16 @@ bool SystemZAsmParser::parseRegister(Register &Reg) {
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}
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}
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// Parse a register of group Group. If Regs is nonnull, use it to map
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// Parse a register of group Group. If Regs is nonnull, use it to map
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// the raw register number to LLVM numbering, with zero entries indicating
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// the raw register number to LLVM numbering, with zero entries
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// an invalid register. IsAddress says whether the register appears in an
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// indicating an invalid register. IsAddress says whether the
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// address context.
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// register appears in an address context. Allow FP Group if expecting
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// RegV Group, since the f-prefix yields the FP group even while used
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// with vector instructions.
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bool SystemZAsmParser::parseRegister(Register &Reg, RegisterGroup Group,
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bool SystemZAsmParser::parseRegister(Register &Reg, RegisterGroup Group,
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const unsigned *Regs, bool IsAddress) {
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const unsigned *Regs, bool IsAddress) {
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if (parseRegister(Reg))
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if (parseRegister(Reg))
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return true;
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return true;
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if (Reg.Group != Group)
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if (Reg.Group != Group && !(Reg.Group == RegFP && Group == RegV))
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return Error(Reg.StartLoc, "invalid operand for instruction");
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return Error(Reg.StartLoc, "invalid operand for instruction");
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if (Regs && Regs[Reg.Num] == 0)
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if (Regs && Regs[Reg.Num] == 0)
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return Error(Reg.StartLoc, "invalid register pair");
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return Error(Reg.StartLoc, "invalid register pair");
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