forked from OSchip/llvm-project
[AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions. llvm-svn: 192243
This commit is contained in:
parent
9849cc6696
commit
0a903478c6
|
@ -777,4 +777,16 @@ def SCALAR_SCVTFD : SInst<"vcvt_f64", "os", "Sl">;
|
|||
def SCALAR_UCVTFS : SInst<"vcvt_f32", "ys", "SUi">;
|
||||
def SCALAR_UCVTFD : SInst<"vcvt_f64", "os", "SUl">;
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
// Scalar Floating-point Reciprocal Estimate
|
||||
def SCALAR_FRECPE : IInst<"vrecpe", "ss", "SfSd">;
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
// Scalar Floating-point Reciprocal Exponent
|
||||
def SCALAR_FRECPX : IInst<"vrecpx", "ss", "SfSd">;
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
// Scalar Floating-point Reciprocal Square Root Estimate
|
||||
def SCALAR_FRSQRTE : IInst<"vrsqrte", "ss", "SfSd">;
|
||||
|
||||
}
|
||||
|
|
|
@ -1985,6 +1985,21 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
|
|||
case AArch64::BI__builtin_neon_vcvtd_f64_u64:
|
||||
Int = Intrinsic::aarch64_neon_vcvtf64_u64,
|
||||
s = "vcvtf"; OverloadInt = false; break;
|
||||
// Scalar Floating-point Reciprocal Estimate
|
||||
case AArch64::BI__builtin_neon_vrecpes_f32:
|
||||
case AArch64::BI__builtin_neon_vrecped_f64:
|
||||
Int = Intrinsic::arm_neon_vrecpe;
|
||||
s = "vrecpe"; OverloadInt = true; break;
|
||||
// Scalar Floating-point Reciprocal Exponent
|
||||
case AArch64::BI__builtin_neon_vrecpxs_f32:
|
||||
case AArch64::BI__builtin_neon_vrecpxd_f64:
|
||||
Int = Intrinsic::aarch64_neon_vrecpx;
|
||||
s = "vrecpx"; OverloadInt = true; break;
|
||||
// Scalar Floating-point Reciprocal Square Root Estimate
|
||||
case AArch64::BI__builtin_neon_vrsqrtes_f32:
|
||||
case AArch64::BI__builtin_neon_vrsqrted_f64:
|
||||
Int = Intrinsic::arm_neon_vrsqrte;
|
||||
s = "vrsqrte"; OverloadInt = true; break;
|
||||
}
|
||||
|
||||
if (!Int)
|
||||
|
|
|
@ -5621,3 +5621,39 @@ float64_t test_vcvtd_f64_u64(uint64_t a) {
|
|||
// CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}
|
||||
return (float64_t)vcvtd_f64_u64(a);
|
||||
}
|
||||
|
||||
float32_t test_vrecpes_f32(float32_t a) {
|
||||
// CHECK: test_vrecpes_f32
|
||||
// CHECK: frecpe {{s[0-9]+}}, {{s[0-9]+}}
|
||||
return vrecpes_f32(a);
|
||||
}
|
||||
|
||||
float64_t test_vrecped_f64(float64_t a) {
|
||||
// CHECK: test_vrecped_f64
|
||||
// CHECK: frecpe {{d[0-9]+}}, {{d[0-9]+}}
|
||||
return vrecped_f64(a);
|
||||
}
|
||||
|
||||
float32_t test_vrecpxs_f32(float32_t a) {
|
||||
// CHECK: test_vrecpxs_f32
|
||||
// CHECK: frecpx {{s[0-9]+}}, {{s[0-9]+}}
|
||||
return vrecpxs_f32(a);
|
||||
}
|
||||
|
||||
float64_t test_vrecpxd_f64(float64_t a) {
|
||||
// CHECK: test_vrecpxd_f64
|
||||
// CHECK: frecpx {{d[0-9]+}}, {{d[0-9]+}}
|
||||
return vrecpxd_f64(a);
|
||||
}
|
||||
|
||||
float32_t test_vrsqrtes_f32(float32_t a) {
|
||||
// CHECK: vrsqrtes_f32
|
||||
// CHECK: frsqrte {{s[0-9]+}}, {{s[0-9]+}}
|
||||
return vrsqrtes_f32(a);
|
||||
}
|
||||
|
||||
float64_t test_vrsqrted_f64(float64_t a) {
|
||||
// CHECK: vrsqrted_f64
|
||||
// CHECK: frsqrte {{d[0-9]+}}, {{d[0-9]+}}
|
||||
return vrsqrted_f64(a);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue