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Correctly Load Mixed FP-GP Variadic Arguments for x86-64. 

According to the x86-64 ABI, structures with both floating point and
integer members are split between floating-point and general purpose
registers, and consecutive 32-bit floats can be packed into a single
floating point register.

In the case of variadic functions these are stored to memory and the position
recorded in the va_list. This was already correctly implemented in
llvm.va_start.

The problem is that the code in clang for implementing va_arg was reading
floating point registers from the wrong location.

Patch by Thomas Jablin.

Fixes PR20018.

llvm-svn: 211626
This commit is contained in:
Rafael Espindola 2014-06-24 20:01:50 +00:00
parent c6326a46ea
commit 0a500af186
2 changed files with 17 additions and 2 deletions
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4
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -2590,8 +2590,8 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr;
llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr;
llvm::Value *RegLoAddr = TyLo->isFPOrFPVectorTy() ? FPAddr : GPAddr;
llvm::Value *RegHiAddr = TyLo->isFPOrFPVectorTy() ? GPAddr : FPAddr;
llvm::Value *V =
CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));

15
clang/test/CodeGen/variadic-gpfp-x86.c Normal file
View File

@ -0,0 +1,15 @@
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s
struct Bar {
float f1;
float f2;
unsigned u;
};
struct Bar foo(__builtin_va_list ap) {
return __builtin_va_arg(ap, struct Bar);
// CHECK: [[FPOP:%.*]] = getelementptr inbounds %struct.__va_list_tag* {{.*}}, i32 0, i32 1
// CHECK: [[FPO:%.*]] = load i32* [[FPOP]]
// CHECK: [[FPVEC:%.*]] = getelementptr i8* {{.*}}, i32 [[FPO]]
// CHECK: bitcast i8* [[FPVEC]] to <2 x float>*
}