forked from OSchip/llvm-project
First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
They won't work with the new ISel mechanism, as Requires predicates are no longer allowed to reference the node being selected. Moving the predicate to the patterns instead solves the problem. This patch handles ARM mode. Thumb2 will follow. llvm-svn: 96381
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@ -236,6 +236,21 @@ def imm0_65535 : PatLeaf<(i32 imm), [{
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class BinOpFrag<dag res> : PatFrag<(ops node:$LHS, node:$RHS), res>;
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class UnOpFrag <dag res> : PatFrag<(ops node:$Src), res>;
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/// adde and sube predicates - True based on whether the carry flag output
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/// will be needed or not.
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def adde_dead_carry :
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PatFrag<(ops node:$LHS, node:$RHS), (adde node:$LHS, node:$RHS),
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[{return !N->hasAnyUseOfValue(1);}]>;
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def sube_dead_carry :
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PatFrag<(ops node:$LHS, node:$RHS), (sube node:$LHS, node:$RHS),
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[{return !N->hasAnyUseOfValue(1);}]>;
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def adde_live_carry :
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PatFrag<(ops node:$LHS, node:$RHS), (adde node:$LHS, node:$RHS),
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[{return N->hasAnyUseOfValue(1);}]>;
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def sube_live_carry :
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PatFrag<(ops node:$LHS, node:$RHS), (sube node:$LHS, node:$RHS),
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[{return N->hasAnyUseOfValue(1);}]>;
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//===----------------------------------------------------------------------===//
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// Operand Definitions.
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//
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@ -524,13 +539,13 @@ multiclass AI1_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode,
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def ri : AsI1<opcod, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, opc, "\t$dst, $a, $b",
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[(set GPR:$dst, (opnode GPR:$a, so_imm:$b))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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Requires<[IsARM]> {
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let Inst{25} = 1;
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}
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def rr : AsI1<opcod, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
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DPFrm, IIC_iALUr, opc, "\t$dst, $a, $b",
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[(set GPR:$dst, (opnode GPR:$a, GPR:$b))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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Requires<[IsARM]> {
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let isCommutable = Commutable;
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let Inst{11-4} = 0b00000000;
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let Inst{25} = 0;
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@ -538,7 +553,7 @@ multiclass AI1_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode,
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def rs : AsI1<opcod, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, opc, "\t$dst, $a, $b",
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[(set GPR:$dst, (opnode GPR:$a, so_reg:$b))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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Requires<[IsARM]> {
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let Inst{25} = 0;
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}
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}
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@ -549,7 +564,7 @@ multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
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def Sri : AXI1<opcod, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, !strconcat(opc, "\t$dst, $a, $b"),
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[(set GPR:$dst, (opnode GPR:$a, so_imm:$b))]>,
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Requires<[IsARM, CarryDefIsUsed]> {
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Requires<[IsARM]> {
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let Defs = [CPSR];
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let Inst{20} = 1;
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let Inst{25} = 1;
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@ -557,7 +572,7 @@ multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
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def Srr : AXI1<opcod, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
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DPFrm, IIC_iALUr, !strconcat(opc, "\t$dst, $a, $b"),
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[(set GPR:$dst, (opnode GPR:$a, GPR:$b))]>,
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Requires<[IsARM, CarryDefIsUsed]> {
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Requires<[IsARM]> {
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let Defs = [CPSR];
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let Inst{11-4} = 0b00000000;
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let Inst{20} = 1;
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@ -566,7 +581,7 @@ multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
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def Srs : AXI1<opcod, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, !strconcat(opc, "\t$dst, $a, $b"),
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[(set GPR:$dst, (opnode GPR:$a, so_reg:$b))]>,
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Requires<[IsARM, CarryDefIsUsed]> {
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Requires<[IsARM]> {
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let Defs = [CPSR];
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let Inst{20} = 1;
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let Inst{25} = 0;
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@ -1290,13 +1305,13 @@ defm SUBS : AI1_bin_s_irs<0b0010, "subs",
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BinOpFrag<(subc node:$LHS, node:$RHS)>>;
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defm ADC : AI1_adde_sube_irs<0b0101, "adc",
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BinOpFrag<(adde node:$LHS, node:$RHS)>, 1>;
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BinOpFrag<(adde_dead_carry node:$LHS, node:$RHS)>, 1>;
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defm SBC : AI1_adde_sube_irs<0b0110, "sbc",
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BinOpFrag<(sube node:$LHS, node:$RHS)>>;
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BinOpFrag<(sube_dead_carry node:$LHS, node:$RHS)>>;
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defm ADCS : AI1_adde_sube_s_irs<0b0101, "adcs",
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BinOpFrag<(adde node:$LHS, node:$RHS)>, 1>;
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BinOpFrag<(adde_live_carry node:$LHS, node:$RHS)>, 1>;
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defm SBCS : AI1_adde_sube_s_irs<0b0110, "sbcs",
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BinOpFrag<(sube node:$LHS, node:$RHS)>>;
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BinOpFrag<(sube_live_carry node:$LHS, node:$RHS) >>;
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// These don't define reg/reg forms, because they are handled above.
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def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm,
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@ -1330,14 +1345,14 @@ def RSBSrs : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm,
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let Uses = [CPSR] in {
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def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, "rsc", "\t$dst, $a, $b",
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[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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[(set GPR:$dst, (sube_dead_carry so_imm:$b, GPR:$a))]>,
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Requires<[IsARM]> {
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let Inst{25} = 1;
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}
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def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, "rsc", "\t$dst, $a, $b",
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[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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[(set GPR:$dst, (sube_dead_carry so_reg:$b, GPR:$a))]>,
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Requires<[IsARM]> {
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let Inst{25} = 0;
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}
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}
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@ -1346,15 +1361,15 @@ def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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let Defs = [CPSR], Uses = [CPSR] in {
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def RSCSri : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, "rscs\t$dst, $a, $b",
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[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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[(set GPR:$dst, (sube_dead_carry so_imm:$b, GPR:$a))]>,
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Requires<[IsARM]> {
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let Inst{20} = 1;
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let Inst{25} = 1;
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}
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def RSCSrs : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, "rscs\t$dst, $a, $b",
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[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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[(set GPR:$dst, (sube_dead_carry so_reg:$b, GPR:$a))]>,
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Requires<[IsARM]> {
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let Inst{20} = 1;
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let Inst{25} = 0;
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}
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