forked from OSchip/llvm-project
[X86] Regenerated bitreverse tests to demonstrate what is going on.
llvm-svn: 274915
This commit is contained in:
Simon Pilgrim
parent
aaaeedb8cb
commit
0a0e0d4e8e
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
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; These tests just check that the plumbing is in place for @llvm.bitreverse. The
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; These tests just check that the plumbing is in place for @llvm.bitreverse. The
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@ -5,18 +6,239 @@
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declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone
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declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone
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define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) {
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define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) nounwind {
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; CHECK-LABEL: test_bitreverse_v2i16:
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; CHECK-LABEL: test_bitreverse_v2i16:
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; CHECK: shll
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shll $15, %ecx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: andl $2, %esi
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; CHECK-NEXT: shll $13, %esi
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; CHECK-NEXT: orl %ecx, %esi
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andl $4, %ecx
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; CHECK-NEXT: shll $11, %ecx
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; CHECK-NEXT: orl %esi, %ecx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: shll $9, %esi
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; CHECK-NEXT: orl %ecx, %esi
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; CHECK-NEXT: movl %eax, %edi
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; CHECK-NEXT: andl $16, %edi
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; CHECK-NEXT: shll $7, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andl $32, %ecx
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; CHECK-NEXT: shll $5, %ecx
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; CHECK-NEXT: orl %edi, %ecx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: andl $64, %esi
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; CHECK-NEXT: shll $3, %esi
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; CHECK-NEXT: leal (%eax,%eax), %edi
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; CHECK-NEXT: andl $256, %edi # imm = 0x100
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl %esi
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; CHECK-NEXT: andl $128, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %eax, %edi
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; CHECK-NEXT: shrl $3, %edi
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; CHECK-NEXT: andl $64, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $5, %esi
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; CHECK-NEXT: andl $32, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %eax, %edi
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; CHECK-NEXT: shrl $7, %edi
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; CHECK-NEXT: andl $16, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $9, %esi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %eax, %edi
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; CHECK-NEXT: shrl $11, %edi
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; CHECK-NEXT: andl $4, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $13, %esi
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; CHECK-NEXT: andl $2, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: shrl $15, %eax
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; CHECK-NEXT: orl %esi, %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shll $15, %ecx
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: andl $2, %esi
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; CHECK-NEXT: shll $13, %esi
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; CHECK-NEXT: orl %ecx, %esi
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: andl $4, %ecx
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; CHECK-NEXT: shll $11, %ecx
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; CHECK-NEXT: orl %esi, %ecx
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: shll $9, %esi
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; CHECK-NEXT: orl %ecx, %esi
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; CHECK-NEXT: movl %edx, %edi
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; CHECK-NEXT: andl $16, %edi
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; CHECK-NEXT: shll $7, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: andl $32, %ecx
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; CHECK-NEXT: shll $5, %ecx
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; CHECK-NEXT: orl %edi, %ecx
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: andl $64, %esi
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; CHECK-NEXT: shll $3, %esi
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; CHECK-NEXT: leal (%edx,%edx), %edi
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; CHECK-NEXT: andl $256, %edi # imm = 0x100
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: shrl %esi
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; CHECK-NEXT: andl $128, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %edx, %edi
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; CHECK-NEXT: shrl $3, %edi
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; CHECK-NEXT: andl $64, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: shrl $5, %esi
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; CHECK-NEXT: andl $32, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %edx, %edi
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; CHECK-NEXT: shrl $7, %edi
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; CHECK-NEXT: andl $16, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: shrl $9, %esi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %edx, %edi
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; CHECK-NEXT: shrl $11, %edi
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; CHECK-NEXT: andl $4, %edi
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edx, %esi
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; CHECK-NEXT: shrl $13, %esi
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; CHECK-NEXT: andl $2, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: shrl $15, %edx
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: orl %ecx, %edx
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: retl
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%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
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%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
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ret <2 x i16> %b
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ret <2 x i16> %b
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}
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}
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declare i24 @llvm.bitreverse.i24(i24) readnone
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declare i24 @llvm.bitreverse.i24(i24) readnone
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define i24 @test_bitreverse_i24(i24 %a) {
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define i24 @test_bitreverse_i24(i24 %a) nounwind {
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; CHECK-LABEL: test_bitreverse_i24:
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; CHECK-LABEL: test_bitreverse_i24:
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; CHECK: shll
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shll $31, %ecx
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: andl $2, %edx
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; CHECK-NEXT: shll $29, %edx
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; CHECK-NEXT: orl %ecx, %edx
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andl $4, %ecx
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; CHECK-NEXT: shll $27, %ecx
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; CHECK-NEXT: orl %edx, %ecx
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: andl $8, %edx
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; CHECK-NEXT: shll $25, %edx
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; CHECK-NEXT: orl %ecx, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: andl $16, %esi
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; CHECK-NEXT: shll $23, %esi
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andl $32, %ecx
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; CHECK-NEXT: shll $21, %ecx
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; CHECK-NEXT: orl %esi, %ecx
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: andl $64, %edx
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; CHECK-NEXT: shll $19, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shll $17, %esi
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; CHECK-NEXT: andl $16777216, %esi # imm = 0x1000000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shll $15, %edx
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; CHECK-NEXT: andl $8388608, %edx # imm = 0x800000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shll $13, %esi
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; CHECK-NEXT: andl $4194304, %esi # imm = 0x400000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shll $11, %edx
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; CHECK-NEXT: andl $2097152, %edx # imm = 0x200000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shll $9, %esi
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; CHECK-NEXT: andl $1048576, %esi # imm = 0x100000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shll $7, %edx
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; CHECK-NEXT: andl $524288, %edx # imm = 0x80000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shll $5, %esi
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; CHECK-NEXT: andl $262144, %esi # imm = 0x40000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: leal (,%eax,8), %edx
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; CHECK-NEXT: andl $131072, %edx # imm = 0x20000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: leal (%eax,%eax), %esi
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; CHECK-NEXT: andl $65536, %esi # imm = 0x10000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl %edx
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; CHECK-NEXT: andl $32768, %edx # imm = 0x8000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $3, %esi
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; CHECK-NEXT: andl $16384, %esi # imm = 0x4000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $5, %edx
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; CHECK-NEXT: andl $8192, %edx # imm = 0x2000
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $7, %esi
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; CHECK-NEXT: andl $4096, %esi # imm = 0x1000
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $9, %edx
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; CHECK-NEXT: andl $2048, %edx # imm = 0x800
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: shrl $11, %esi
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; CHECK-NEXT: andl $1024, %esi # imm = 0x400
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $13, %edx
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; CHECK-NEXT: andl $512, %edx # imm = 0x200
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: shrl $15, %eax
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; CHECK-NEXT: andl $256, %eax # imm = 0x100
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; CHECK-NEXT: orl %edx, %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: shrl $8, %eax
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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%b = call i24 @llvm.bitreverse.i24(i24 %a)
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%b = call i24 @llvm.bitreverse.i24(i24 %a)
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ret i24 %b
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ret i24 %b
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}
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}
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@ -25,7 +247,37 @@ declare i8 @llvm.bitreverse.i8(i8) readnone
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define i8 @test_bitreverse_i8(i8 %a) {
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define i8 @test_bitreverse_i8(i8 %a) {
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; CHECK-LABEL: test_bitreverse_i8:
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; CHECK-LABEL: test_bitreverse_i8:
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; CHECK: shlb
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; CHECK: # BB#0:
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shlb $7, %cl
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shlb $5, %dl
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; CHECK-NEXT: andb $64, %dl
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; CHECK-NEXT: movb %al, %ah
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; CHECK-NEXT: shlb $3, %ah
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; CHECK-NEXT: andb $32, %ah
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; CHECK-NEXT: orb %dl, %ah
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: addb %dl, %dl
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; CHECK-NEXT: andb $16, %dl
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; CHECK-NEXT: orb %ah, %dl
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; CHECK-NEXT: movb %al, %ah
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; CHECK-NEXT: shrb %ah
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; CHECK-NEXT: andb $8, %ah
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; CHECK-NEXT: orb %dl, %ah
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrb $3, %dl
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; CHECK-NEXT: andb $4, %dl
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; CHECK-NEXT: orb %ah, %dl
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; CHECK-NEXT: movb %al, %ah
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; CHECK-NEXT: shrb $5, %ah
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; CHECK-NEXT: andb $2, %ah
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; CHECK-NEXT: orb %dl, %ah
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; CHECK-NEXT: shrb $7, %al
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; CHECK-NEXT: orb %ah, %al
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; CHECK-NEXT: orb %cl, %al
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; CHECK-NEXT: retl
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%b = call i8 @llvm.bitreverse.i8(i8 %a)
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%b = call i8 @llvm.bitreverse.i8(i8 %a)
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ret i8 %b
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ret i8 %b
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}
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}
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@ -34,7 +286,23 @@ declare i4 @llvm.bitreverse.i4(i4) readnone
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define i4 @test_bitreverse_i4(i4 %a) {
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define i4 @test_bitreverse_i4(i4 %a) {
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; CHECK-LABEL: test_bitreverse_i4:
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; CHECK-LABEL: test_bitreverse_i4:
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; CHECK: shlb
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; CHECK: # BB#0:
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shlb $7, %cl
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shlb $5, %dl
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; CHECK-NEXT: andb $64, %dl
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; CHECK-NEXT: movb %al, %ah
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; CHECK-NEXT: shlb $3, %ah
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; CHECK-NEXT: andb $32, %ah
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; CHECK-NEXT: orb %dl, %ah
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; CHECK-NEXT: addb %al, %al
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||||||
|
; CHECK-NEXT: andb $16, %al
|
||||||
|
; CHECK-NEXT: orb %ah, %al
|
||||||
|
; CHECK-NEXT: orb %cl, %al
|
||||||
|
; CHECK-NEXT: shrb $4, %al
|
||||||
|
; CHECK-NEXT: retl
|
||||||
%b = call i4 @llvm.bitreverse.i4(i4 %a)
|
%b = call i4 @llvm.bitreverse.i4(i4 %a)
|
||||||
ret i4 %b
|
ret i4 %b
|
||||||
}
|
}
|
||||||
|
|
@ -54,7 +322,7 @@ define <2 x i16> @fold_v2i16() {
|
||||||
define i24 @fold_i24() {
|
define i24 @fold_i24() {
|
||||||
; CHECK-LABEL: fold_i24:
|
; CHECK-LABEL: fold_i24:
|
||||||
; CHECK: # BB#0:
|
; CHECK: # BB#0:
|
||||||
; CHECK-NEXT: movl $2048, %eax
|
; CHECK-NEXT: movl $2048, %eax # imm = 0x800
|
||||||
; CHECK-NEXT: retl
|
; CHECK-NEXT: retl
|
||||||
%b = call i24 @llvm.bitreverse.i24(i24 4096)
|
%b = call i24 @llvm.bitreverse.i24(i24 4096)
|
||||||
ret i24 %b
|
ret i24 %b
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue