forked from OSchip/llvm-project
If an xmm register is referenced explicitly in an inline asm, make sure to
assign it to a version of the xmm register with the regclass that matches its type. This fixes PR2715, a bug handling some crazy xpcom case in mozilla. llvm-svn: 55358
This commit is contained in:
Chris Lattner
parent
e36c39f3bf
commit
09f8cef571
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@ -7221,56 +7221,68 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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// 16-bit register pieces "ax","dx","cx","bx","si","di","bp","sp". If we
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// really want an 8-bit or 32-bit register, map to the appropriate register
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// class and return the appropriate register.
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if (Res.second != X86::GR16RegisterClass)
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return Res;
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if (VT == MVT::i8) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::AL; break;
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case X86::DX: DestReg = X86::DL; break;
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case X86::CX: DestReg = X86::CL; break;
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case X86::BX: DestReg = X86::BL; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR8RegisterClass;
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}
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} else if (VT == MVT::i32) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::EAX; break;
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case X86::DX: DestReg = X86::EDX; break;
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case X86::CX: DestReg = X86::ECX; break;
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case X86::BX: DestReg = X86::EBX; break;
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case X86::SI: DestReg = X86::ESI; break;
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case X86::DI: DestReg = X86::EDI; break;
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case X86::BP: DestReg = X86::EBP; break;
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case X86::SP: DestReg = X86::ESP; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR32RegisterClass;
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}
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} else if (VT == MVT::i64) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::RAX; break;
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case X86::DX: DestReg = X86::RDX; break;
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case X86::CX: DestReg = X86::RCX; break;
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case X86::BX: DestReg = X86::RBX; break;
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case X86::SI: DestReg = X86::RSI; break;
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case X86::DI: DestReg = X86::RDI; break;
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case X86::BP: DestReg = X86::RBP; break;
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case X86::SP: DestReg = X86::RSP; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR64RegisterClass;
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if (Res.second == X86::GR16RegisterClass) {
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if (VT == MVT::i8) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::AL; break;
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case X86::DX: DestReg = X86::DL; break;
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case X86::CX: DestReg = X86::CL; break;
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case X86::BX: DestReg = X86::BL; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR8RegisterClass;
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}
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} else if (VT == MVT::i32) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::EAX; break;
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case X86::DX: DestReg = X86::EDX; break;
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case X86::CX: DestReg = X86::ECX; break;
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case X86::BX: DestReg = X86::EBX; break;
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case X86::SI: DestReg = X86::ESI; break;
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case X86::DI: DestReg = X86::EDI; break;
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case X86::BP: DestReg = X86::EBP; break;
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case X86::SP: DestReg = X86::ESP; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR32RegisterClass;
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}
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} else if (VT == MVT::i64) {
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unsigned DestReg = 0;
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switch (Res.first) {
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default: break;
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case X86::AX: DestReg = X86::RAX; break;
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case X86::DX: DestReg = X86::RDX; break;
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case X86::CX: DestReg = X86::RCX; break;
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case X86::BX: DestReg = X86::RBX; break;
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case X86::SI: DestReg = X86::RSI; break;
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case X86::DI: DestReg = X86::RDI; break;
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case X86::BP: DestReg = X86::RBP; break;
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case X86::SP: DestReg = X86::RSP; break;
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}
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if (DestReg) {
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Res.first = DestReg;
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Res.second = Res.second = X86::GR64RegisterClass;
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}
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}
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} else if (Res.second == X86::FR32RegisterClass ||
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Res.second == X86::FR64RegisterClass ||
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Res.second == X86::VR128RegisterClass) {
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// Handle references to XMM physical registers that got mapped into the
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// wrong class. This can happen with constraints like {xmm0} where the
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// target independent register mapper will just pick the first match it can
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// find, ignoring the required type.
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if (VT == MVT::f32)
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Res.second = X86::FR32RegisterClass;
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else if (VT == MVT::f64)
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Res.second = X86::FR64RegisterClass;
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else if (X86::VR128RegisterClass->hasType(VT))
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Res.second = X86::VR128RegisterClass;
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}
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return Res;
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@ -0,0 +1,16 @@
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; RUN: llvm-as < %s | llc -mcpu=yonah
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; PR2715
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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%struct.XPTTypeDescriptorPrefix = type { i8 }
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%struct.nsISupports = type { i32 (...)** }
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%struct.nsXPTCMiniVariant = type { %"struct.nsXPTCMiniVariant::._39" }
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%"struct.nsXPTCMiniVariant::._39" = type { i64 }
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%struct.nsXPTCVariant = type { %struct.nsXPTCMiniVariant, i8*, %struct.nsXPTType, i8 }
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%struct.nsXPTType = type { %struct.XPTTypeDescriptorPrefix }
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define i32 @XPTC_InvokeByIndex(%struct.nsISupports* %that, i32 %methodIndex, i32 %paramCount, %struct.nsXPTCVariant* %params) nounwind {
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entry:
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call void asm sideeffect "", "{xmm0},{xmm1},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},~{dirflag},~{fpsr},~{flags}"( double undef, double undef, double undef, double 1.0, double undef, double 0.0, double undef, double 0.0 ) nounwind
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ret i32 0
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}
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