forked from OSchip/llvm-project
Add x86 CLMUL (Carry-less multiplication) cpu feature
llvm-svn: 109206
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@ -357,6 +357,7 @@ def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;
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def HasSSE42 : Predicate<"Subtarget->hasSSE42()">;
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def HasSSE4A : Predicate<"Subtarget->hasSSE4A()">;
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def HasAVX : Predicate<"Subtarget->hasAVX()">;
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def HasCLMUL : Predicate<"Subtarget->hasCLMUL()">;
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def HasFMA3 : Predicate<"Subtarget->hasFMA3()">;
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def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;
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def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
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@ -260,9 +260,10 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
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bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
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bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
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HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
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HasAVX = ((ECX >> 28) & 0x1);
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HasAES = IsIntel && ((ECX >> 25) & 0x1);
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HasCLMUL = IsIntel && ((ECX >> 1) & 0x1);
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HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
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HasAVX = ((ECX >> 28) & 0x1);
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HasAES = IsIntel && ((ECX >> 25) & 0x1);
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if (IsIntel || IsAMD) {
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// Determine if bit test memory instructions are slow.
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@ -291,6 +292,7 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
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, HasSSE4A(false)
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, HasAVX(false)
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, HasAES(false)
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, HasCLMUL(false)
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, HasFMA3(false)
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, HasFMA4(false)
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, IsBTMemSlow(false)
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@ -74,6 +74,9 @@ protected:
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/// HasAES - Target has AES instructions
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bool HasAES;
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/// HasCLMUL - Target has carry-less multiplication
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bool HasCLMUL;
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/// HasFMA3 - Target has 3-operand fused multiply-add
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bool HasFMA3;
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@ -149,6 +152,7 @@ public:
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bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
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bool hasAVX() const { return HasAVX; }
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bool hasAES() const { return HasAES; }
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bool hasCLMUL() const { return HasCLMUL; }
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bool hasFMA3() const { return HasFMA3; }
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bool hasFMA4() const { return HasFMA4; }
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bool isBTMemSlow() const { return IsBTMemSlow; }
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