forked from OSchip/llvm-project
[X86] Fix emitEpilogue() to make less assumptions about pops
This is the mirror image of r242395. When X86FrameLowering::emitEpilogue() looks for where to insert the %esp addition that deallocates stack space used for local allocations, it assumes that any sequence of pop instructions from function exit backwards consists purely of restoring callee-save registers. This may be false, since from some point backward, the pops may be clean-up of stack space allocated for arguments to a call. Patch by: amjad.aboud@intel.com Differential Revision: http://reviews.llvm.org/D12688 llvm-svn: 247784
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@ -64,8 +64,10 @@ public:
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NoFlags = 0,
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FrameSetup = 1 << 0, // Instruction is used as a part of
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// function frame setup code.
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BundledPred = 1 << 1, // Instruction has bundled predecessors.
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BundledSucc = 1 << 2 // Instruction has bundled successors.
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FrameDestroy = 1 << 1, // Instruction is used as a part of
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// function frame destruction code.
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BundledPred = 1 << 2, // Instruction has bundled predecessors.
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BundledSucc = 1 << 3 // Instruction has bundled successors.
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};
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private:
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const MCInstrDesc *MCID; // Instruction descriptor.
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@ -1735,13 +1735,16 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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}
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bool HaveSemi = false;
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const unsigned PrintableFlags = FrameSetup;
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const unsigned PrintableFlags = FrameSetup | FrameDestroy;
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if (Flags & PrintableFlags) {
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if (!HaveSemi) OS << ";"; HaveSemi = true;
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OS << " flags: ";
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if (Flags & FrameSetup)
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OS << "FrameSetup";
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if (Flags & FrameDestroy)
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OS << "FrameDestroy";
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}
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if (!memoperands_empty()) {
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@ -286,6 +286,8 @@ void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
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.addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
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if (isSub)
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MI->setFlag(MachineInstr::FrameSetup);
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else
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MI->setFlag(MachineInstr::FrameDestroy);
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Offset -= ThisVal;
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continue;
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}
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@ -295,6 +297,8 @@ void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
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MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue);
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if (isSub)
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MI.setMIFlag(MachineInstr::FrameSetup);
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else
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MI.setMIFlag(MachineInstr::FrameDestroy);
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Offset -= ThisVal;
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}
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@ -1075,7 +1079,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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// Pop EBP.
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BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
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MachineFramePtr);
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MachineFramePtr).setMIFlag(MachineInstr::FrameDestroy);
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} else if (hasFP(MF)) {
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// Calculate required stack adjustment.
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uint64_t FrameSize = StackSize - SlotSize;
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@ -1088,7 +1092,8 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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// Pop EBP.
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BuildMI(MBB, MBBI, DL,
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TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr);
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TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
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.setMIFlag(MachineInstr::FrameDestroy);
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} else {
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NumBytes = StackSize - CSSize;
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}
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@ -1099,8 +1104,9 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock::iterator PI = std::prev(MBBI);
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unsigned Opc = PI->getOpcode();
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if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE &&
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!PI->isTerminator())
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if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
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(Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
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Opc != X86::DBG_VALUE && !PI->isTerminator())
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break;
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--MBBI;
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@ -1463,7 +1469,8 @@ bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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!X86::GR32RegClass.contains(Reg))
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continue;
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BuildMI(MBB, MI, DL, TII.get(Opc), Reg);
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BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
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.setMIFlag(MachineInstr::FrameDestroy);
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}
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return true;
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}
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