forked from OSchip/llvm-project
[AMDGPU][MC] Added missing VOP3P opcodes
Added support of the following opcodes: v_pk_sub_u16 v_pk_mad_i16 v_pk_mad_u16 See Bug 33593: https://bugs.llvm.org//show_bug.cgi?id=33593 Reviewers: vpykhtin, artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D34890 llvm-svn: 308281
This commit is contained in:
Dmitry Preobrazhensky
parent
d667417e80
commit
095ec3da81
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@ -34,6 +34,9 @@ class VOP3_VOP3PInst<string OpName, VOPProfile P, SDPatternOperator node = null_
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let isCommutable = 1 in {
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def V_PK_FMA_F16 : VOP3PInst<"v_pk_fma_f16", VOP3_Profile<VOP_V2F16_V2F16_V2F16_V2F16>, fma>;
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def V_PK_MAD_I16 : VOP3PInst<"v_pk_mad_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16_V2I16>>;
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def V_PK_MAD_U16 : VOP3PInst<"v_pk_mad_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16_V2I16>>;
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def V_PK_ADD_F16 : VOP3PInst<"v_pk_add_f16", VOP3_Profile<VOP_V2F16_V2F16_V2F16>, fadd>;
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def V_PK_MUL_F16 : VOP3PInst<"v_pk_mul_f16", VOP3_Profile<VOP_V2F16_V2F16_V2F16>, fmul>;
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def V_PK_MAX_F16 : VOP3PInst<"v_pk_max_f16", VOP3_Profile<VOP_V2F16_V2F16_V2F16>, fmaxnum>;
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@ -41,7 +44,6 @@ def V_PK_MIN_F16 : VOP3PInst<"v_pk_min_f16", VOP3_Profile<VOP_V2F16_V2F16_V2F16>
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def V_PK_ADD_U16 : VOP3PInst<"v_pk_add_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, add>;
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def V_PK_ADD_I16 : VOP3PInst<"v_pk_add_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>>;
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def V_PK_SUB_I16 : VOP3PInst<"v_pk_sub_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, sub>;
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def V_PK_MUL_LO_U16 : VOP3PInst<"v_pk_mul_lo_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, mul>;
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def V_PK_MIN_I16 : VOP3PInst<"v_pk_min_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, smin>;
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@ -50,6 +52,9 @@ def V_PK_MAX_I16 : VOP3PInst<"v_pk_max_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>
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def V_PK_MAX_U16 : VOP3PInst<"v_pk_max_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, umax>;
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}
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def V_PK_SUB_U16 : VOP3PInst<"v_pk_sub_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>>;
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def V_PK_SUB_I16 : VOP3PInst<"v_pk_sub_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, sub>;
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def V_PK_LSHLREV_B16 : VOP3PInst<"v_pk_lshlrev_b16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, lshl_rev>;
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def V_PK_ASHRREV_I16 : VOP3PInst<"v_pk_ashrrev_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, ashr_rev>;
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def V_PK_LSHRREV_B16 : VOP3PInst<"v_pk_lshrrev_b16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, lshr_rev>;
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@ -71,6 +76,7 @@ multiclass VOP3P_Real_vi<bits<10> op> {
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}
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}
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defm V_PK_MAD_I16 : VOP3P_Real_vi <0x380>;
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defm V_PK_MUL_LO_U16 : VOP3P_Real_vi <0x381>;
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defm V_PK_ADD_I16 : VOP3P_Real_vi <0x382>;
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defm V_PK_SUB_I16 : VOP3P_Real_vi <0x383>;
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@ -79,8 +85,10 @@ defm V_PK_LSHRREV_B16 : VOP3P_Real_vi <0x385>;
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defm V_PK_ASHRREV_I16 : VOP3P_Real_vi <0x386>;
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defm V_PK_MAX_I16 : VOP3P_Real_vi <0x387>;
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defm V_PK_MIN_I16 : VOP3P_Real_vi <0x388>;
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defm V_PK_MAD_U16 : VOP3P_Real_vi <0x389>;
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defm V_PK_ADD_U16 : VOP3P_Real_vi <0x38a>;
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defm V_PK_SUB_U16 : VOP3P_Real_vi <0x38b>;
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defm V_PK_MAX_U16 : VOP3P_Real_vi <0x38c>;
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defm V_PK_MIN_U16 : VOP3P_Real_vi <0x38d>;
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defm V_PK_FMA_F16 : VOP3P_Real_vi <0x38e>;
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@ -105392,3 +105392,354 @@ v_mad_mixlo_f16 v5, |v1|, |v2|, |v3|
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v_mad_mixlo_f16 v5, v1, v2, v3 clamp
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// CHECK: [0x05,0xc0,0xa1,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v255, v1, v2, v3
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// CHECK: [0xff,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v255, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0xff,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, s1, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, s101, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x65,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, flat_scratch_lo, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x66,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, flat_scratch_hi, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x67,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, vcc_lo, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x6a,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, vcc_hi, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x6b,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, m0, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x7c,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, exec_lo, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x7e,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, exec_hi, v2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x7f,0x04,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v255, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xff,0x0f,0x1c]
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v_pk_mad_i16 v5, v1, s2, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, s101, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xcb,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, flat_scratch_lo, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xcd,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, flat_scratch_hi, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xcf,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, vcc_lo, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xd5,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, vcc_hi, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xd7,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, m0, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xf9,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, exec_lo, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xfd,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, exec_hi, v3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0xff,0x0c,0x1c]
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v_pk_mad_i16 v5, v1, v2, v255
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x1f]
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v_pk_mad_i16 v5, v1, v2, s3
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x18]
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v_pk_mad_i16 v5, v1, v2, s101
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x96,0x19]
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v_pk_mad_i16 v5, v1, v2, flat_scratch_lo
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x9a,0x19]
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v_pk_mad_i16 v5, v1, v2, flat_scratch_hi
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x9e,0x19]
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v_pk_mad_i16 v5, v1, v2, vcc_lo
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xaa,0x19]
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v_pk_mad_i16 v5, v1, v2, vcc_hi
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xae,0x19]
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v_pk_mad_i16 v5, v1, v2, m0
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xf2,0x19]
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v_pk_mad_i16 v5, v1, v2, exec_lo
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfa,0x19]
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v_pk_mad_i16 v5, v1, v2, exec_hi
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x19]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel:[0,0,0]
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel:[1,0,0]
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// CHECK: [0x05,0x48,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel:[0,1,0]
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// CHECK: [0x05,0x50,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel:[0,0,1]
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// CHECK: [0x05,0x60,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel:[1,1,1]
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// CHECK: [0x05,0x78,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[1,1,1]
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,0,0]
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// CHECK: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x04]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[1,0,0]
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// CHECK: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x0c]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,1,0]
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// CHECK: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x14]
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v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,0,1]
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// CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x04]
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v_pk_mad_i16 v5, v1, v2, v3 clamp
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// CHECK: [0x05,0xc0,0x80,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_u16 v5, v1, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_u16 v255, v1, v2, v3
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// CHECK: [0xff,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
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v_pk_mad_u16 v5, v255, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0xff,0x05,0x0e,0x1c]
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v_pk_mad_u16 v5, s1, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, s101, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x65,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, flat_scratch_lo, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x66,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, flat_scratch_hi, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x67,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, vcc_lo, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x6a,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, vcc_hi, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x6b,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, m0, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x7c,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, exec_lo, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x7e,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, exec_hi, v2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x7f,0x04,0x0e,0x1c]
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v_pk_mad_u16 v5, v1, v255, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xff,0x0f,0x1c]
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v_pk_mad_u16 v5, v1, s2, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, s101, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xcb,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, flat_scratch_lo, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xcd,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, flat_scratch_hi, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xcf,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, vcc_lo, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xd5,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, vcc_hi, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xd7,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, m0, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xf9,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, exec_lo, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xfd,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, exec_hi, v3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0xff,0x0c,0x1c]
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v_pk_mad_u16 v5, v1, v2, v255
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x1f]
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v_pk_mad_u16 v5, v1, v2, s3
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x18]
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v_pk_mad_u16 v5, v1, v2, s101
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x96,0x19]
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v_pk_mad_u16 v5, v1, v2, flat_scratch_lo
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x9a,0x19]
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v_pk_mad_u16 v5, v1, v2, flat_scratch_hi
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// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x9e,0x19]
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||||
v_pk_mad_u16 v5, v1, v2, vcc_lo
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xaa,0x19]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, vcc_hi
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xae,0x19]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, m0
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xf2,0x19]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, exec_lo
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfa,0x19]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, exec_hi
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x19]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel:[0,0,0]
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel:[1,0,0]
|
||||
// CHECK: [0x05,0x48,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel:[0,1,0]
|
||||
// CHECK: [0x05,0x50,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel:[0,0,1]
|
||||
// CHECK: [0x05,0x60,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel:[1,1,1]
|
||||
// CHECK: [0x05,0x78,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[1,1,1]
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,0,0]
|
||||
// CHECK: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x04]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[1,0,0]
|
||||
// CHECK: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x0c]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,1,0]
|
||||
// CHECK: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x14]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,0,1]
|
||||
// CHECK: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x04]
|
||||
|
||||
v_pk_mad_u16 v5, v1, v2, v3 clamp
|
||||
// CHECK: [0x05,0xc0,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v255, v1, v2
|
||||
// CHECK: [0xff,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v255, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0xff,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, s1, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, s101, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x65,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, flat_scratch_lo, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x66,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, flat_scratch_hi, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x67,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, vcc_lo, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x6a,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, vcc_hi, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x6b,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, m0, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x7c,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, exec_lo, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x7e,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, exec_hi, v2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x7f,0x04,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v255
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x03,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, s2
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, s101
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcb,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, flat_scratch_lo
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcd,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, flat_scratch_hi
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcf,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, vcc_lo
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xd5,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, vcc_hi
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xd7,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, m0
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xf9,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, exec_lo
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xfd,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, exec_hi
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x00,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel:[0,0]
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel:[1,0]
|
||||
// CHECK: [0x05,0x08,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel:[0,1]
|
||||
// CHECK: [0x05,0x10,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel:[1,1]
|
||||
// CHECK: [0x05,0x18,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[1,1]
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,0]
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x00]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[1,0]
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x08]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,1]
|
||||
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x10]
|
||||
|
||||
v_pk_sub_u16 v5, v1, v2 clamp
|
||||
// CHECK: [0x05,0x80,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
|
|
|
|||
|
|
@ -88934,3 +88934,336 @@
|
|||
|
||||
# CHECK: v_pk_sub_i16 v5, v1, v2 clamp ; encoding: [0x05,0x80,0x83,0xd3,0x01,0x05,0x02,0x18]
|
||||
0x05,0x80,0x83,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v255, v1, v2, v3 ; encoding: [0xff,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0xff,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v255, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0xff,0x05,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0xff,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, s1, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, s101, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x65,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x65,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x66,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x66,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x67,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x67,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x6a,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x6a,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x6b,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x6b,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, m0, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x7c,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x7c,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, exec_lo, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x7e,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x7e,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, exec_hi, v2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x7f,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x7f,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v255, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xff,0x0f,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xff,0x0f,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, s2, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, s101, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xcb,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xcb,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, flat_scratch_lo, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xcd,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xcd,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, flat_scratch_hi, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xcf,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xcf,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, vcc_lo, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xd5,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xd5,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, vcc_hi, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xd7,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xd7,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, m0, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xf9,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xf9,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, exec_lo, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xfd,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xfd,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, exec_hi, v3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0xff,0x0c,0x1c]
|
||||
0x05,0x40,0x80,0xd3,0x01,0xff,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v255 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x1f]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x1f
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, s3 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x18]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x18
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, s101 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x96,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x96,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, flat_scratch_lo ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x9a,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x9a,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, flat_scratch_hi ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x9e,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x9e,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, vcc_lo ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xaa,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xaa,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, vcc_hi ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xae,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xae,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, m0 ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xf2,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xf2,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, exec_lo ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfa,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xfa,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, exec_hi ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x19]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0xfe,0x19
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x05,0x48,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x48,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel:[0,1,0] ; encoding: [0x05,0x50,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x50,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel:[0,0,1] ; encoding: [0x05,0x60,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x60,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel:[1,1,1] ; encoding: [0x05,0x78,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x78,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x04]
|
||||
0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x04
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[1,0,0] ; encoding: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x0c]
|
||||
0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x0c
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,1,0] ; encoding: [0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x14]
|
||||
0x05,0x00,0x80,0xd3,0x01,0x05,0x0e,0x14
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 op_sel_hi:[0,0,1] ; encoding: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x04]
|
||||
0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x04
|
||||
|
||||
# CHECK: v_pk_mad_i16 v5, v1, v2, v3 clamp ; encoding: [0x05,0xc0,0x80,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0xc0,0x80,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v255, v1, v2, v3 ; encoding: [0xff,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0xff,0x40,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v255, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0xff,0x05,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0xff,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, s1, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, s101, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x65,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x65,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x66,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x66,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x67,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x67,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x6a,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x6a,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x6b,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x6b,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, m0, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x7c,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x7c,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, exec_lo, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x7e,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x7e,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, exec_hi, v2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x7f,0x04,0x0e,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x7f,0x04,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v255, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xff,0x0f,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xff,0x0f,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, s2, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, s101, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xcb,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xcb,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, flat_scratch_lo, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xcd,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xcd,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, flat_scratch_hi, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xcf,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xcf,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, vcc_lo, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xd5,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xd5,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, vcc_hi, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xd7,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xd7,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, m0, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xf9,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xf9,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, exec_lo, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xfd,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xfd,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, exec_hi, v3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0xff,0x0c,0x1c]
|
||||
0x05,0x40,0x89,0xd3,0x01,0xff,0x0c,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v255 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x1f]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x1f
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, s3 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x18]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x18
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, s101 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x96,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x96,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, flat_scratch_lo ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x9a,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x9a,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, flat_scratch_hi ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x9e,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x9e,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, vcc_lo ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xaa,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xaa,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, vcc_hi ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xae,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xae,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, m0 ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xf2,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xf2,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, exec_lo ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfa,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xfa,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, exec_hi ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x19]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0xfe,0x19
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x05,0x48,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x48,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel:[0,1,0] ; encoding: [0x05,0x50,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x50,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel:[0,0,1] ; encoding: [0x05,0x60,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x60,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel:[1,1,1] ; encoding: [0x05,0x78,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0x78,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x04]
|
||||
0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x04
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[1,0,0] ; encoding: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x0c]
|
||||
0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x0c
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,1,0] ; encoding: [0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x14]
|
||||
0x05,0x00,0x89,0xd3,0x01,0x05,0x0e,0x14
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 op_sel_hi:[0,0,1] ; encoding: [0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x04]
|
||||
0x05,0x40,0x89,0xd3,0x01,0x05,0x0e,0x04
|
||||
|
||||
# CHECK: v_pk_mad_u16 v5, v1, v2, v3 clamp ; encoding: [0x05,0xc0,0x89,0xd3,0x01,0x05,0x0e,0x1c]
|
||||
0x05,0xc0,0x89,0xd3,0x01,0x05,0x0e,0x1c
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v255, v1, v2 ; encoding: [0xff,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
0xff,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v255, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0xff,0x05,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0xff,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, s1, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, s101, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x65,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x65,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, flat_scratch_lo, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x66,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x66,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, flat_scratch_hi, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x67,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x67,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, vcc_lo, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x6a,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x6a,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, vcc_hi, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x6b,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x6b,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, m0, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x7c,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x7c,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, exec_lo, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x7e,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x7e,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, exec_hi, v2 ; encoding: [0x05,0x00,0x8b,0xd3,0x7f,0x04,0x02,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x7f,0x04,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v255 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x03,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xff,0x03,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, s2 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x05,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, s101 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xcb,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xcb,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, flat_scratch_lo ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xcd,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xcd,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, flat_scratch_hi ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xcf,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xcf,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, vcc_lo ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xd5,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xd5,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, vcc_hi ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xd7,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xd7,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, m0 ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xf9,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xf9,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, exec_lo ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xfd,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xfd,0x00,0x18
|
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# CHECK: v_pk_sub_u16 v5, v1, exec_hi ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x00,0x18]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0xff,0x00,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel:[1,0] ; encoding: [0x05,0x08,0x8b,0xd3,0x01,0x05,0x02,0x18]
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||||
0x05,0x08,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel:[0,1] ; encoding: [0x05,0x10,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
0x05,0x10,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel:[1,1] ; encoding: [0x05,0x18,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
0x05,0x18,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,0] ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x00]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x00
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel_hi:[1,0] ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x08]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x08
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,1] ; encoding: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x10]
|
||||
0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x10
|
||||
|
||||
# CHECK: v_pk_sub_u16 v5, v1, v2 clamp ; encoding: [0x05,0x80,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
||||
0x05,0x80,0x8b,0xd3,0x01,0x05,0x02,0x18
|
||||
|
|
|
|||
Loading…
Reference in New Issue