forked from OSchip/llvm-project
ScopInfo: Look up first (and only) array access
When rewriting the access functions of load/store statements, we are only interested in the actual array memory location. The current code just took the very first memory access, which could be a scalar or an array access. As a result, we failed to update access functions even though this was requested via .jscop. llvm-svn: 255713
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028685a5db
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0921477248
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@ -979,6 +979,33 @@ public:
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return *MA;
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}
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/// @brief Return the only array access for @p Inst.
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///
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/// @param Inst The instruction for which to look up the access.
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/// @returns The unique array memory access related to Inst.
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MemoryAccess &getArrayAccessFor(const Instruction *Inst) const {
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auto It = InstructionToAccess.find(Inst);
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assert(It != InstructionToAccess.end() &&
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"No memory accesses found for instruction");
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auto *Accesses = It->getSecond();
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assert(Accesses && "No memory accesses found for instruction");
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MemoryAccess *ArrayAccess = nullptr;
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for (auto Access : *Accesses) {
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if (!Access->isArrayKind())
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continue;
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assert(!ArrayAccess && "More then one array access for instruction");
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ArrayAccess = Access;
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}
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assert(ArrayAccess && "No array access found for instruction!");
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return *ArrayAccess;
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}
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/// @brief Return the __first__ (scalar) memory access for @p Inst if any.
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MemoryAccess *lookupAccessFor(const Instruction *Inst) const {
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auto It = InstructionToAccess.find(Inst);
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@ -164,7 +164,7 @@ void BlockGenerator::copyInstScalar(ScopStmt &Stmt, Instruction *Inst,
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Value *BlockGenerator::generateLocationAccessed(
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ScopStmt &Stmt, const Instruction *Inst, Value *Pointer, ValueMapT &BBMap,
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LoopToScevMapT <S, isl_id_to_ast_expr *NewAccesses) {
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const MemoryAccess &MA = Stmt.getAccessFor(Inst);
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const MemoryAccess &MA = Stmt.getArrayAccessFor(Inst);
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isl_ast_expr *AccessExpr = isl_id_to_ast_expr_get(NewAccesses, MA.getId());
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@ -0,0 +1,46 @@
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; RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S \
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; RUN: -polly-import-jscop-postfix=transformed -polly-codegen \
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; RUN: < %s -S | FileCheck %s
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; CHECK: polly.stmt.loop2:
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; CHECK-NEXT: %polly.access.A = getelementptr double, double* %A, i64 42
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; CHECK-NEXT: %val_p_scalar_ = load double, double* %polly.access.A
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; CHECK: polly.stmt.loop3:
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; CHECK-NEXT: %val.s2a.reload = load double, double* %val.s2a
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; CHECK-NEXT: %polly.access.A20 = getelementptr double, double* %A, i64 42
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; CHECK-NEXT: store double %val.s2a.reload, double* %polly.access.A20
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @update_access_functions(i64 %arg, double* %A) {
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bb3:
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br label %loop1
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loop1:
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%indvar = phi i64 [ %indvar.next, %loop1 ], [ 1, %bb3 ]
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%ptr1 = getelementptr inbounds double, double* %A, i64 %indvar
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store double 42.0, double* %ptr1, align 8
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%indvar.next = add nuw nsw i64 %indvar, 1
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%cmp = icmp ne i64 %indvar.next, %arg
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br i1 %cmp, label %loop1, label %loop2
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loop2:
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%indvar.2 = phi i64 [ %indvar.2.next, %loop2 ], [ 1, %loop1 ]
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%ptr2 = getelementptr inbounds double, double* %A, i64 %indvar.2
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%val = load double, double* %ptr2, align 8
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%indvar.2.next = add nuw nsw i64 %indvar.2, 1
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%cmp.2 = icmp ne i64 %indvar.2.next, %arg
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br i1 %cmp.2, label %loop2, label %loop3
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loop3:
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%indvar.3 = phi i64 [ %indvar.3.next, %loop3 ], [ 1, %loop2 ]
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%ptr3 = getelementptr inbounds double, double* %A, i64 %indvar.3
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store double %val, double* %ptr3, align 8
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%indvar.3.next = add nuw nsw i64 %indvar.3, 1
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%cmp.3 = icmp ne i64 %indvar.3.next, %arg
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br i1 %cmp.3, label %loop3, label %exit
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exit:
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ret void
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}
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@ -0,0 +1,47 @@
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{
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"context" : "[arg] -> { : arg >= -9223372036854775808 and arg <= 9223372036854775807 }",
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"name" : "loop1 => exit",
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"statements" : [
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop1[i0] -> MemRef_A[1 + i0] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop1[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop1",
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"schedule" : "[arg] -> { Stmt_loop1[i0] -> [0, i0] }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_A[1 + i0] }"
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},
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_val[] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop2[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop2",
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"schedule" : "[arg] -> { Stmt_loop2[i0] -> [1, i0] }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_val[] }"
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},
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_A[1 + i0] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop3[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop3",
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"schedule" : "[arg] -> { Stmt_loop3[i0] -> [2, i0] }"
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}
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]
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}
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@ -0,0 +1,47 @@
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{
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"context" : "[arg] -> { : arg >= -9223372036854775808 and arg <= 9223372036854775807 }",
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"name" : "loop1 => exit",
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"statements" : [
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop1[i0] -> MemRef_A[1 + i0] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop1[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop1",
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"schedule" : "[arg] -> { Stmt_loop1[i0] -> [0, i0] }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_A[42] }"
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},
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_val[] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop2[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop2",
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"schedule" : "[arg] -> { Stmt_loop2[i0] -> [1, i0] }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_val[] }"
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},
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{
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"kind" : "write",
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"relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_A[42] }"
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}
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],
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"domain" : "[arg] -> { Stmt_loop3[i0] : i0 >= 0 and i0 <= -2 + arg }",
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"name" : "Stmt_loop3",
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"schedule" : "[arg] -> { Stmt_loop3[i0] -> [2, i0] }"
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}
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]
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}
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