forked from OSchip/llvm-project
[ELF][MIPS] Remove support for linking microMIPS 64-bit code
Remove support for linking microMIPS 64-bit code because this kind of ISA is rarely used and unsupported by LLVM. Differential revision: https://reviews.llvm.org/D48949 llvm-svn: 336413
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@ -101,8 +101,6 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
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case R_MIPS_HIGHEST:
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case R_MICROMIPS_HI16:
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case R_MICROMIPS_LO16:
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case R_MICROMIPS_HIGHER:
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case R_MICROMIPS_HIGHEST:
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// R_MIPS_HI16/R_MIPS_LO16 relocations against _gp_disp calculate
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// offset between start of function and 'gp' value which by default
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// equal to the start of .got section. In that case we consider these
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@ -124,8 +122,6 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
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case R_MIPS_TLS_TPREL_LO16:
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case R_MIPS_TLS_TPREL32:
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case R_MIPS_TLS_TPREL64:
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case R_MICROMIPS_GOT_OFST:
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case R_MICROMIPS_SUB:
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case R_MICROMIPS_TLS_DTPREL_HI16:
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case R_MICROMIPS_TLS_DTPREL_LO16:
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case R_MICROMIPS_TLS_TPREL_HI16:
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@ -155,7 +151,6 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
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case R_MIPS_GOT_DISP:
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case R_MIPS_TLS_GOTTPREL:
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case R_MICROMIPS_CALL16:
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case R_MICROMIPS_GOT_DISP:
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case R_MICROMIPS_TLS_GOTTPREL:
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return R_MIPS_GOT_OFF;
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case R_MIPS_CALL_HI16:
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@ -168,7 +163,6 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
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case R_MICROMIPS_GOT_LO16:
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return R_MIPS_GOT_OFF32;
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case R_MIPS_GOT_PAGE:
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case R_MICROMIPS_GOT_PAGE:
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return R_MIPS_GOT_LOCAL_PAGE;
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case R_MIPS_TLS_GD:
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case R_MICROMIPS_TLS_GD:
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@ -457,9 +451,6 @@ calculateMipsRelChain(uint8_t *Loc, RelType Type, uint64_t Val) {
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return std::make_pair(Type2, Val);
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if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
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return std::make_pair(Type3, -Val);
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if (Type2 == R_MICROMIPS_SUB &&
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(Type3 == R_MICROMIPS_HI16 || Type3 == R_MICROMIPS_LO16))
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return std::make_pair(Type3, -Val);
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error(getErrorLocation(Loc) + "unsupported relocations combination " +
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Twine(Type));
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return std::make_pair(Type & 0xff, Val);
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@ -538,8 +529,6 @@ void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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case R_MIPS_TLS_TPREL_LO16:
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writeValue<E>(Loc, Val, 16, 0);
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break;
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case R_MICROMIPS_GOT_DISP:
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case R_MICROMIPS_GOT_PAGE:
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case R_MICROMIPS_GPREL16:
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case R_MICROMIPS_TLS_GD:
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case R_MICROMIPS_TLS_LDM:
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@ -548,7 +537,6 @@ void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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break;
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case R_MICROMIPS_CALL16:
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case R_MICROMIPS_CALL_LO16:
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case R_MICROMIPS_GOT_OFST:
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case R_MICROMIPS_LO16:
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case R_MICROMIPS_TLS_DTPREL_LO16:
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case R_MICROMIPS_TLS_GOTTPREL:
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@ -580,12 +568,6 @@ void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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case R_MIPS_HIGHEST:
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writeValue<E>(Loc, Val + 0x800080008000, 16, 48);
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break;
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case R_MICROMIPS_HIGHER:
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writeShuffleValue<E>(Loc, Val + 0x80008000, 16, 32);
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break;
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case R_MICROMIPS_HIGHEST:
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writeShuffleValue<E>(Loc, Val + 0x800080008000, 16, 48);
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break;
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case R_MIPS_JALR:
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case R_MICROMIPS_JALR:
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// Ignore this optimization relocation for now
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@ -653,7 +635,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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template <class ELFT> bool MIPS<ELFT>::usesOnlyLowPageBits(RelType Type) const {
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return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST ||
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Type == R_MICROMIPS_LO16 || Type == R_MICROMIPS_GOT_OFST;
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Type == R_MICROMIPS_LO16;
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}
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// Return true if the symbol is a PIC function.
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@ -64,12 +64,21 @@ static StringRef getNanName(bool IsNan2008) {
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static StringRef getFpName(bool IsFp64) { return IsFp64 ? "64" : "32"; }
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static void rejectMicroMips64(const FileFlags &F) {
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if (Config->Is64 && F.Flags & EF_MIPS_MICROMIPS)
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error("linking microMIPS 64-bit files is unsupported: " + toString(F.File));
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}
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static void checkFlags(ArrayRef<FileFlags> Files) {
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uint32_t ABI = Files[0].Flags & (EF_MIPS_ABI | EF_MIPS_ABI2);
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bool Nan = Files[0].Flags & EF_MIPS_NAN2008;
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bool Fp = Files[0].Flags & EF_MIPS_FP64;
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rejectMicroMips64(Files[0]);
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for (const FileFlags &F : Files.slice(1)) {
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rejectMicroMips64(F);
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uint32_t ABI2 = F.Flags & (EF_MIPS_ABI | EF_MIPS_ABI2);
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if (ABI != ABI2)
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error("target ABI '" + getAbiName(ABI) + "' is incompatible with '" +
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@ -1,53 +0,0 @@
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# REQUIRES: mips
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# Check microMIPS GOT relocations for N64 ABI.
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# microMIPS 64-bit is unsupported by LLVM starting from r335057.
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# But such code can be generated by GCC. Mark this test as XFAIL
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# while decide to drop microMIPS 64-bit support from LLD too or
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# use binary inputs for the test.
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# XFAIL: *
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# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=micromips \
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# RUN: %s -o %t1.o
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# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=micromips \
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# RUN: %S/Inputs/mips-dynamic.s -o %t2.o
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# RUN: ld.lld %t2.o -shared -o %t.so
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# RUN: ld.lld %t1.o %t.so -o %t.exe
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# RUN: llvm-readobj -mips-plt-got %t.exe | FileCheck %s
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# CHECK: Local entries [
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# CHECK-NEXT: Entry {
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# CHECK-NEXT: Address:
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# CHECK-NEXT: Access: -32736
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# CHECK-NEXT: Initial: 0x30000
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# CHECK-NEXT: }
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# CHECK-NEXT: Entry {
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# CHECK-NEXT: Address:
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# CHECK-NEXT: Access: -32728
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# CHECK-NEXT: Initial: 0x40000
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: Global entries [
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# CHECK-NEXT: Entry {
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# CHECK-NEXT: Address:
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# CHECK-NEXT: Access: -32720
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# CHECK-NEXT: Initial: 0x0
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# CHECK-NEXT: Value: 0x0
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# CHECK-NEXT: Type: Function
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# CHECK-NEXT: Section: Undefined
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# CHECK-NEXT: Name: foo0
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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.text
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.global __start
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__start:
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lui $28, %hi(%neg(%gp_rel(foo0)))
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addiu $28, $28, %lo(%neg(%gp_rel(foo0)))
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lw $4, %got_page(data)($28)
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addiu $4, $4, %got_ofst(data)
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lw $25, %call16(foo0)($28)
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.data
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data:
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.word 0
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@ -0,0 +1,23 @@
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# REQUIRES: mips
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#
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# Check that the linker rejects microMIPS64 input files.
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# RUN: yaml2obj %s -o %t.o
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# RUN: not ld.lld %t.o -shared -o %t.so 2>&1 | FileCheck %s
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# CHECK: linking microMIPS 64-bit files is unsupported: {{.*}}mips-micro64-reject.test
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!ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2MSB
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Type: ET_REL
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Machine: EM_MIPS
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Flags: [ EF_MIPS_MICROMIPS, EF_MIPS_ARCH_64 ]
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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Content: 00000000
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@ -1,28 +0,0 @@
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# REQUIRES: mips
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# microMIPS 64-bit is unsupported by LLVM starting from r335057.
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# But such code can be generated by GCC. Mark this test as XFAIL
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# while decide to drop microMIPS 64-bit support from LLD too or
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# use binary inputs for the test.
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# XFAIL: *
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# Check handling of some microMIPS relocations in 64-bit mode.
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# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux \
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# RUN: -mattr=micromips %s -o %t1.o
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# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux \
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# RUN: -mattr=micromips %S/Inputs/mips-dynamic.s -o %t2.o
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# RUN: ld.lld %t1.o %t2.o -o %t.exe
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# RUN: llvm-objdump -d %t.exe | FileCheck %s
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.global __start
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__start:
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lui $7, %highest(_foo+0x300047FFF7FF8)
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lui $7, %higher (_foo+0x300047FFF7FF8)
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lui $gp, %hi(%neg(%gp_rel(__start)))
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lui $gp, %lo(%neg(%gp_rel(__start)))
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# CHECK: 20000: a7 41 03 00 lui $7, 3
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# CHECK-NEXT: 20004: a7 41 05 00 lui $7, 5
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# CHECK-NEXT: 20008: bc 41 02 00 lui $gp, 2
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# CHECK-NEXT: 2000c: bc 41 00 80 lui $gp, 32768
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@ -8,8 +8,6 @@
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#
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# as -mips32 -o test.o \
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# && ld.bfd -m elf32btsmip -r test.o -o mips-gp0-non-zero.o
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# as -mips64 -mmicromips -o test.o \
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# && ld.bfd -m elf64btsmip -r test.o -o mips-micro-gp0-non-zero.o
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# as -mips64 -o test.o \
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# && ld.bfd -m elf64btsmip -r test.o -o mips-n64-gp0-non-zero.o
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@ -44,11 +42,6 @@
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# RUN: llvm-readobj -r %S/Inputs/mips-n64-gp0-non-zero.o %t-64.r \
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# RUN: | FileCheck --check-prefix=ADDEND64 %s
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# RUN: ld.lld -r -o %t-micro.r %S/Inputs/mips-micro-gp0-non-zero.o
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# RUN: llvm-readobj -mips-options %t-micro.r | FileCheck --check-prefix=GPVAL %s
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# RUN: llvm-readobj -r %S/Inputs/mips-micro-gp0-non-zero.o %t-micro.r \
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# RUN: | FileCheck --check-prefix=ADDENDMM %s
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# GPVAL: GP: 0x0
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# ADDEND32: Contents of section .rodata:
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@ -59,8 +52,3 @@
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# ADDEND64: .text 0xFFFFFFFFFFFF8011
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# ADDEND64: File: {{.*}}{{/|\\}}mips-non-zero-gp0.s.tmp-64.r
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# ADDEND64: .text 0x0
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# ADDENDMM: File: {{.*}}{{/|\\}}mips-micro-gp0-non-zero.o
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# ADDENDMM: .text 0xFFFFFFFFFFFF8012
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# ADDENDMM: File: {{.*}}{{/|\\}}mips-non-zero-gp0.s.tmp-micro.r
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# ADDENDMM: .text 0x1
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