forked from OSchip/llvm-project
parent
7223557752
commit
08d84943af
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@ -1297,7 +1297,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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int32_t Immediate = Desc->getSize() == 4 ? 0 : -1;
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bool HaveVSrc = false, HaveSSrc = false;
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// First figure out what we alread have in this instruction
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// First figure out what we already have in this instruction.
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for (unsigned i = 0, e = Node->getNumOperands(), Op = NumDefs;
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i != e && Op < NumOps; ++i, ++Op) {
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@ -1316,7 +1316,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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}
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}
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// If we neither have VSrc nor SSrc it makes no sense to continue
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// If we neither have VSrc nor SSrc, it makes no sense to continue.
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if (!HaveVSrc && !HaveSSrc)
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return Node;
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@ -1332,17 +1332,17 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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const SDValue &Operand = Node->getOperand(i);
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Ops.push_back(Operand);
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// Already folded immediate ?
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// Already folded immediate?
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if (isa<ConstantSDNode>(Operand.getNode()) ||
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isa<ConstantFPSDNode>(Operand.getNode()))
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continue;
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// Is this a VSrc or SSrc operand ?
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// Is this a VSrc or SSrc operand?
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unsigned RegClass = Desc->OpInfo[Op].RegClass;
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if (isVSrc(RegClass) || isSSrc(RegClass)) {
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// Try to fold the immediates
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if (!foldImm(Ops[i], Immediate, ScalarSlotUsed)) {
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// Folding didn't worked, make sure we don't hit the SReg limit
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// Folding didn't work, make sure we don't hit the SReg limit.
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ensureSRegLimit(DAG, Ops[i], RegClass, ScalarSlotUsed);
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}
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continue;
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@ -1535,7 +1535,7 @@ void SITargetLowering::adjustWritemask(MachineSDNode *&Node,
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}
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}
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/// \brief Fold the instructions after slecting them
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/// \brief Fold the instructions after selecting them.
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SDNode *SITargetLowering::PostISelFolding(MachineSDNode *Node,
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SelectionDAG &DAG) const {
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const SIInstrInfo *TII =
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@ -731,8 +731,8 @@ unsigned SIInstrInfo::buildExtractSubReg(MachineBasicBlock::iterator MI,
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unsigned SubReg = MRI.createVirtualRegister(SubRC);
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// Just in case the super register is itself a sub-register, copy it to a new
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// value so we don't need to wory about merging its subreg index with the
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// SubIdx passed to this function. The register coalescer should be able to
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// value so we don't need to worry about merging its subreg index with the
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// SubIdx passed to this function. The register coalescer should be able to
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// eliminate this extra copy.
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BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(TargetOpcode::COPY),
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NewSuperReg)
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