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[X86] Use IsProfitableToFold to block vinsertf128rm in favor of insert_subreg instead of artifically increasing pattern complexity to give priority. 

This is a much more direct way to solve the issue than just giving extra priority.

llvm-svn: 336639
This commit is contained in:
Craig Topper 2018-07-10 06:19:54 +00:00
parent db73f56489
commit 08b81a5508
2 changed files with 5 additions and 1 deletions
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5
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -614,6 +614,11 @@ X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
}
}
// Prevent folding a load if this can implemented with an insert_subreg.
if (Root->getOpcode() == ISD::INSERT_SUBVECTOR &&
Root->getOperand(0).isUndef() && isNullConstant(Root->getOperand(2)))
return false;
return true;
}

1
llvm/lib/Target/X86/X86InstrVecCompiler.td
View File

@ -147,7 +147,6 @@ multiclass subvector_subreg_lowering<RegisterClass subRC, ValueType subVT,
def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR 0))),
(subVT (EXTRACT_SUBREG RC:$src, subIdx))>;
let AddedComplexity = 25 in // to give priority over vinsertf128rm
def : Pat<(VT (insert_subvector undef, subRC:$src, (iPTR 0))),
(VT (INSERT_SUBREG (IMPLICIT_DEF), subRC:$src, subIdx))>;
}