From 08a880509e4f7ca8d346dce42fe7528c3a33f22c Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 11 Aug 2022 16:07:28 +0100 Subject: [PATCH] [X86] Add RDPRU instruction CPUID bit masks As mentioned on D128934 - we weren't including the CPUID bit handling for the RDPRU instruction AMD's APMv3 (24594) lists it as CPUID Fn8000_0008_EBX Bit#4 --- clang/lib/Headers/cpuid.h | 1 + llvm/lib/Support/Host.cpp | 1 + 2 files changed, 2 insertions(+) diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h index 5d262a60735f..caa0069c2e1f 100644 --- a/clang/lib/Headers/cpuid.h +++ b/clang/lib/Headers/cpuid.h @@ -232,6 +232,7 @@ /* Features in %ebx for leaf 0x80000008 */ #define bit_CLZERO 0x00000001 +#define bit_RDPRU 0x00000010 #define bit_WBNOINVD 0x00000200 diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index 40d85924de41..f67acd741631 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -1734,6 +1734,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) { bool HasExtLeaf8 = MaxExtLevel >= 0x80000008 && !getX86CpuIDAndInfo(0x80000008, &EAX, &EBX, &ECX, &EDX); Features["clzero"] = HasExtLeaf8 && ((EBX >> 0) & 1); + Features["rdpru"] = HasExtLeaf8 && ((EBX >> 4) & 1); Features["wbnoinvd"] = HasExtLeaf8 && ((EBX >> 9) & 1); bool HasLeaf7 =