forked from OSchip/llvm-project
[Hexagon] Improve generated code for test-if-bit-clear, one more time
Adjust isel patterns after recent commit. Fixes https://llvm.org/PR43194. llvm-svn: 370913
This commit is contained in:
Krzysztof Parzyszek
parent
a71c199f82
commit
08a09822a5
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@ -1763,14 +1763,12 @@ def: Pat<(and (srl I64:$Rss, IsULE<32,31>:$u6), 1),
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def: Pat<(and (srl I64:$Rss, IsUGT<32,31>:$u6), 1),
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(ToZext64 (I1toI32 (S2_tstbit_i (HiReg $Rss), (UDEC32 $u6))))>;
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def N1toI32: OutPatFrag<(ops node:$Pu), (C2_muxii (i1 $Pu), 0, 1)>;
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def: Pat<(and (not (srl I32:$Rs, u5_0ImmPred:$u5)), 1),
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(N1toI32 (S2_tstbit_i I32:$Rs, imm:$u5))>;
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(I1toI32 (S4_ntstbit_i I32:$Rs, imm:$u5))>;
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def: Pat<(and (not (srl I64:$Rss, IsULE<32,31>:$u6)), 1),
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(ToZext64 (N1toI32 (S2_tstbit_i (LoReg $Rss), imm:$u6)))>;
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(ToZext64 (I1toI32 (S4_ntstbit_i (LoReg $Rss), imm:$u6)))>;
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def: Pat<(and (not (srl I64:$Rss, IsUGT<32,31>:$u6)), 1),
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(ToZext64 (N1toI32 (S2_tstbit_i (HiReg $Rss), (UDEC32 $u6))))>;
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(ToZext64 (I1toI32 (S4_ntstbit_i (HiReg $Rss), (UDEC32 $u6))))>;
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let AddedComplexity = 20 in { // Complexity greater than compare reg-imm.
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def: Pat<(i1 (seteq (and I32:$Rs, u6_0ImmPred:$u6), 0)),
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@ -1792,23 +1790,28 @@ def: Pat<(HexagonTSTBIT I32:$Rs, u5_0ImmPred:$u5),
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def: Pat<(HexagonTSTBIT I32:$Rs, I32:$Rt),
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(S2_tstbit_r I32:$Rs, I32:$Rt)>;
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let AddedComplexity = 20 in { // Complexity greater than cmp reg-imm.
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def: Pat<(i1 (seteq (and (shl 1, u5_0ImmPred:$u5), I32:$Rs), 0)),
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(S4_ntstbit_i I32:$Rs, imm:$u5)>;
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def: Pat<(i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)),
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(S4_ntstbit_r I32:$Rs, I32:$Rt)>;
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}
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// Add extra complexity to prefer these instructions over bitsset/bitsclr.
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// The reason is that tstbit/ntstbit can be folded into a compound instruction:
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// if ([!]tstbit(...)) jump ...
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let AddedComplexity = 100 in
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def: Pat<(i1 (setne (and I32:$Rs, (i32 IsPow2_32:$u5)), (i32 0))),
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(S2_tstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
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let AddedComplexity = 20 in { // Complexity greater than cmp reg-imm.
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def: Pat<(i1 (seteq (and I32:$Rs, IsPow2_32:$u5), 0)),
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(S4_ntstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
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def: Pat<(i1 (setne (and I32:$Rs, IsPow2_32:$u5), 0)),
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(S2_tstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
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def: Pat<(i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)),
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(S4_ntstbit_r I32:$Rs, I32:$Rt)>;
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def: Pat<(i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)),
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(S2_tstbit_r I32:$Rs, I32:$Rt)>;
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}
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let AddedComplexity = 100 in
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def: Pat<(i1 (seteq (and I32:$Rs, (i32 IsPow2_32:$u5)), (i32 0))),
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(S4_ntstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
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def: Pat<(i1 (seteq (and I64:$Rs, IsPow2_64L:$u6), 0)),
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(S4_ntstbit_i (LoReg $Rs), (Log2_64 $u6))>;
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def: Pat<(i1 (seteq (and I64:$Rs, IsPow2_64H:$u6), 0)),
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(S4_ntstbit_i (HiReg $Rs), (UDEC32 (i32 (Log2_64 $u6))))>;
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def: Pat<(i1 (setne (and I64:$Rs, IsPow2_64L:$u6), 0)),
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(S2_tstbit_i (LoReg $Rs), (Log2_32 imm:$u6))>;
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def: Pat<(i1 (setne (and I64:$Rs, IsPow2_64H:$u6), 0)),
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(S2_tstbit_i (HiReg $Rs), (UDEC32 (i32 (Log2_32 imm:$u6))))>;
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// Do not increase complexity of these patterns. In the DAG, "cmp i8" may be
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// represented as a compare against "value & 0xFF", which is an exact match
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@ -1828,10 +1831,18 @@ def: Pat<(i1 (setne (and I32:$Rs, I32:$Rt), I32:$Rt)),
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let AddedComplexity = 100 in {
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// Avoid A4_rcmp[n]eqi in these cases:
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def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
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(I1toI32 (S2_tstbit_r IntRegs:$Rs, IntRegs:$Rt))>;
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def: Pat<(i32 (zext (i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
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(I1toI32 (S4_ntstbit_r IntRegs:$Rs, IntRegs:$Rt))>;
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def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
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(I1toI32 (S2_tstbit_r IntRegs:$Rs, IntRegs:$Rt))>;
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def: Pat<(i32 (zext (i1 (seteq (and I32:$Rs, IsPow2_32:$u5), 0)))),
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(I1toI32 (S4_ntstbit_i I32:$Rs, (Log2_32 imm:$u5)))>;
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def: Pat<(i32 (zext (i1 (setne (and I32:$Rs, IsPow2_32:$u5), 0)))),
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(I1toI32 (S2_tstbit_i I32:$Rs, (Log2_32 imm:$u5)))>;
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def: Pat<(i32 (zext (i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
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(I1toI32 (S4_ntstbit_r I32:$Rs, I32:$Rt))>;
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def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
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(I1toI32 (S2_tstbit_r I32:$Rs, I32:$Rt))>;
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}
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// --(11) PIC ------------------------------------------------------------
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@ -80,8 +80,8 @@ b2:
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ret i32 %v6
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}
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define i32 @Prefer_S2_ntstbit_r(i32 %a0, i32 %a1) #0 {
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; CHECK-LABEL: Prefer_S2_ntstbit_r:
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define i32 @Prefer_S4_ntstbit_r(i32 %a0, i32 %a1) #0 {
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; CHECK-LABEL: Prefer_S4_ntstbit_r:
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; CHECK: // %bb.0: // %b2
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = !tstbit(r0,r1)
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@ -20,22 +20,12 @@ b0:
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ret i32 %v3
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}
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; TODO: Match to tstbit?
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define i64 @is_upper_bit_clear_i64(i64 %x) #0 {
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; CHECK-LABEL: is_upper_bit_clear_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = #0
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; CHECK-NEXT: r2 = #32
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; CHECK-NEXT: r7:6 = combine(#0,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r5 = and(r1,r2)
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; CHECK-NEXT: r1 = r4
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = cmp.eq(r5:4,r7:6)
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; CHECK-NEXT: p0 = !tstbit(r1,#5)
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; CHECK-NEXT: r1 = #0
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = mux(p0,#1,#0)
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@ -47,23 +37,14 @@ define i64 @is_upper_bit_clear_i64(i64 %x) #0 {
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ret i64 %r
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}
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; TODO: Match to tstbit?
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define i64 @is_lower_bit_clear_i64(i64 %x) #0 {
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; CHECK-LABEL: is_lower_bit_clear_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r5:4 = combine(#0,#0)
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; CHECK-NEXT: r2 = ##134217728
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; CHECK-NEXT: p0 = !tstbit(r0,#27)
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; CHECK-NEXT: r1 = #0
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = and(r0,r2)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = cmp.eq(r1:0,r5:4)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = mux(p0,#1,#0)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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@ -73,16 +54,14 @@ define i64 @is_lower_bit_clear_i64(i64 %x) #0 {
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ret i64 %r
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}
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; TODO: Match to tstbit?
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define i32 @is_bit_clear_i32(i32 %x) #0 {
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; CHECK-LABEL: is_bit_clear_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = and(r0,##134217728)
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; CHECK-NEXT: p0 = !tstbit(r0,#27)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = cmp.eq(r0,#0)
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; CHECK-NEXT: r0 = mux(p0,#1,#0)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%sh = lshr i32 %x, 27
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@ -91,16 +70,14 @@ define i32 @is_bit_clear_i32(i32 %x) #0 {
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ret i32 %r
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}
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; TODO: Match to tstbit?
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define i16 @is_bit_clear_i16(i16 %x) #0 {
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; CHECK-LABEL: is_bit_clear_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = and(r0,#128)
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; CHECK-NEXT: p0 = !tstbit(r0,#7)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = cmp.eq(r0,#0)
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; CHECK-NEXT: r0 = mux(p0,#1,#0)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%sh = lshr i16 %x, 7
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@ -109,16 +86,14 @@ define i16 @is_bit_clear_i16(i16 %x) #0 {
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ret i16 %r
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}
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; TODO: Match to tstbit?
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define i8 @is_bit_clear_i8(i8 %x) #0 {
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; CHECK-LABEL: is_bit_clear_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = and(r0,#8)
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; CHECK-NEXT: p0 = !tstbit(r0,#3)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = cmp.eq(r0,#0)
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; CHECK-NEXT: r0 = mux(p0,#1,#0)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%sh = lshr i8 %x, 3
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