forked from OSchip/llvm-project
[PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX
Summary: This patch adds support for handling of variadic functions for AIX. This includes ensuring that use and consume correct type of va_list (char *va_list) for AIX. Authored by: ZarkoCA Reviewers: cebowleratibm, sfertile, jasonliu Reviewed by: jasonliu Differential Revision: https://reviews.llvm.org/D76130
This commit is contained in:
jasonliu
parent
75828ef615
commit
085689d44c
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@ -3274,7 +3274,7 @@ SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
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SDLoc dl(Op);
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SDLoc dl(Op);
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if (Subtarget.isPPC64()) {
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if (Subtarget.isPPC64() || Subtarget.isAIXABI()) {
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// vastart just stores the address of the VarArgsFrameIndex slot into the
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// vastart just stores the address of the VarArgsFrameIndex slot into the
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// memory location argument.
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// memory location argument.
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SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
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SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
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@ -7065,9 +7065,6 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
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CallConv == CallingConv::Fast) &&
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CallConv == CallingConv::Fast) &&
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"Unexpected calling convention!");
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"Unexpected calling convention!");
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if (isVarArg)
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report_fatal_error("This call type is unimplemented on AIX.");
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if (getTargetMachine().Options.GuaranteedTailCallOpt)
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if (getTargetMachine().Options.GuaranteedTailCallOpt)
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report_fatal_error("Tail call support is unimplemented on AIX.");
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report_fatal_error("Tail call support is unimplemented on AIX.");
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@ -7085,6 +7082,7 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
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// Assign locations to all of the incoming arguments.
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// Assign locations to all of the incoming arguments.
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SmallVector<CCValAssign, 16> ArgLocs;
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SmallVector<CCValAssign, 16> ArgLocs;
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
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CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
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const EVT PtrVT = getPointerTy(MF.getDataLayout());
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const EVT PtrVT = getPointerTy(MF.getDataLayout());
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@ -7184,7 +7182,7 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
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}
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}
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EVT ValVT = VA.getValVT();
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EVT ValVT = VA.getValVT();
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if (VA.isRegLoc()) {
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if (VA.isRegLoc() && !VA.needsCustom()) {
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MVT::SimpleValueType SVT = ValVT.getSimpleVT().SimpleTy;
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MVT::SimpleValueType SVT = ValVT.getSimpleVT().SimpleTy;
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unsigned VReg =
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unsigned VReg =
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MF.addLiveIn(VA.getLocReg(), getRegClassForSVT(SVT, IsPPC64));
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MF.addLiveIn(VA.getLocReg(), getRegClassForSVT(SVT, IsPPC64));
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@ -7197,23 +7195,26 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
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InVals.push_back(ArgValue);
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InVals.push_back(ArgValue);
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continue;
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continue;
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}
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}
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if (VA.isMemLoc()) {
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const unsigned LocSize = LocVT.getStoreSize();
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const unsigned LocSize = LocVT.getStoreSize();
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const unsigned ValSize = ValVT.getStoreSize();
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const unsigned ValSize = ValVT.getStoreSize();
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assert((ValSize <= LocSize) && "Object size is larger than size of MemLoc");
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assert((ValSize <= LocSize) &&
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int CurArgOffset = VA.getLocMemOffset();
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"Object size is larger than size of MemLoc");
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// Objects are right-justified because AIX is big-endian.
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int CurArgOffset = VA.getLocMemOffset();
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if (LocSize > ValSize)
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// Objects are right-justified because AIX is big-endian.
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CurArgOffset += LocSize - ValSize;
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if (LocSize > ValSize)
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MachineFrameInfo &MFI = MF.getFrameInfo();
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CurArgOffset += LocSize - ValSize;
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// Potential tail calls could cause overwriting of argument stack slots.
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// Potential tail calls could cause overwriting of argument stack slots.
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const bool IsImmutable =
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const bool IsImmutable =
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!(getTargetMachine().Options.GuaranteedTailCallOpt &&
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!(getTargetMachine().Options.GuaranteedTailCallOpt &&
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(CallConv == CallingConv::Fast));
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(CallConv == CallingConv::Fast));
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int FI = MFI.CreateFixedObject(ValSize, CurArgOffset, IsImmutable);
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int FI = MFI.CreateFixedObject(ValSize, CurArgOffset, IsImmutable);
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SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
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SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
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SDValue ArgValue = DAG.getLoad(ValVT, dl, Chain, FIN, MachinePointerInfo());
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SDValue ArgValue =
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InVals.push_back(ArgValue);
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DAG.getLoad(ValVT, dl, Chain, FIN, MachinePointerInfo());
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InVals.push_back(ArgValue);
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continue;
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}
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}
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}
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// On AIX a minimum of 8 words is saved to the parameter save area.
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// On AIX a minimum of 8 words is saved to the parameter save area.
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@ -7231,6 +7232,39 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
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PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
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PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
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FuncInfo->setMinReservedArea(CallerReservedArea);
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FuncInfo->setMinReservedArea(CallerReservedArea);
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if (isVarArg) {
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FuncInfo->setVarArgsFrameIndex(
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MFI.CreateFixedObject(PtrByteSize, CCInfo.getNextStackOffset(), true));
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SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
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static const MCPhysReg GPR_32[] = {PPC::R3, PPC::R4, PPC::R5, PPC::R6,
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PPC::R7, PPC::R8, PPC::R9, PPC::R10};
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static const MCPhysReg GPR_64[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6,
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PPC::X7, PPC::X8, PPC::X9, PPC::X10};
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const unsigned NumGPArgRegs = array_lengthof(IsPPC64 ? GPR_64 : GPR_32);
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// The fixed integer arguments of a variadic function are stored to the
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// VarArgsFrameIndex on the stack so that they may be loaded by
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// dereferencing the result of va_next.
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for (unsigned GPRIndex =
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(CCInfo.getNextStackOffset() - LinkageSize) / PtrByteSize;
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GPRIndex < NumGPArgRegs; ++GPRIndex) {
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const unsigned VReg =
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IsPPC64 ? MF.addLiveIn(GPR_64[GPRIndex], &PPC::G8RCRegClass)
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: MF.addLiveIn(GPR_32[GPRIndex], &PPC::GPRCRegClass);
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SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
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SDValue Store =
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DAG.getStore(Val.getValue(1), dl, Val, FIN, MachinePointerInfo());
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MemOps.push_back(Store);
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// Increment the address for the next argument to store.
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SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);
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FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff);
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}
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}
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if (!MemOps.empty())
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if (!MemOps.empty())
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
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@ -0,0 +1,371 @@
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; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefixes=CHECK,32BIT %s
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; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
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; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | \
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; RUN: FileCheck --check-prefixes=CHECKASM,ASM32 %s
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define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
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entry:
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%arg1 = alloca i8*, align 4
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%arg2 = alloca i8*, align 4
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%0 = bitcast i8** %arg1 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
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%1 = bitcast i8** %arg2 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
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call void @llvm.va_start(i8* nonnull %0)
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call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
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%argp.cur = load i8*, i8** %arg1, align 4
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%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
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store i8* %argp.next, i8** %arg1, align 4
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%2 = bitcast i8* %argp.cur to i32*
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%3 = load i32, i32* %2, align 4
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%add = add nsw i32 %3, %a
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%argp.cur2 = load i8*, i8** %arg2, align 4
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%argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 4
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store i8* %argp.next3, i8** %arg2, align 4
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%4 = bitcast i8* %argp.cur2 to i32*
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%5 = load i32, i32* %4, align 4
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%mul = shl i32 %5, 1
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%add4 = add nsw i32 %add, %mul
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call void @llvm.va_end(i8* nonnull %0)
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call void @llvm.va_end(i8* nonnull %1)
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call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
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call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
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ret i32 %add4
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}
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declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
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declare void @llvm.va_start(i8*)
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declare void @llvm.va_copy(i8*, i8*)
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declare void @llvm.va_end(i8*)
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declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
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; 32BIT-LABEL: name: int_va_arg
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; 32BIT-LABEL; liveins:
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; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
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; 32BIT-LABEL: fixedStack:
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; 32BIT-DAG: - { id: 0, type: default, offset: 28, size: 4
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; 32BIT-LABEL: stack:
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; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
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; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
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; 32BIT-LABEL: body: |
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; 32BIT-DAG: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
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; 32BIT-DAG: STW killed renamable $r4, 0, %fixed-stack.0 :: (store 4 into %fixed-stack.0)
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; 32BIT-DAG: STW killed renamable $r5, 4, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 4)
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; 32BIT-DAG: STW killed renamable $r6, 8, %fixed-stack.0 :: (store 4)
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; 32BIT-DAG: STW killed renamable $r7, 12, %fixed-stack.0 :: (store 4)
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; 32BIT-DAG: STW killed renamable $r8, 16, %fixed-stack.0 :: (store 4)
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; 32BIT-DAG: STW killed renamable $r9, 20, %fixed-stack.0 :: (store 4)
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; 32BIT-DAG: STW killed renamable $r10, 24, %fixed-stack.0 :: (store 4)
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; 32BIT-DAG: STW killed renamable $r5, 0, %stack.1.arg2 :: (store 4 into %ir.arg2)
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; 32BIT-DAG: renamable $r5 = ADDI %fixed-stack.0, 4
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; 32BIT-DAG: STW killed renamable $r4, 0, %stack.1.arg2 :: (store 4 into %ir.1)
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; 32BIT-DAG: renamable $r4 = ADDI %fixed-stack.0, 0
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; 32BIT-DAG: STW renamable $r4, 0, %stack.0.arg1 :: (store 4 into %ir.0)
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; 32BIT-DAG: STW renamable $r5, 0, %stack.0.arg1 :: (store 4 into %ir.arg1)
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; 32BIT-DAG: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.2)
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; 32BIT-DAG: renamable $r5 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.4)
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; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r4, killed renamable $r3
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; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
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; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $r3
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; ASM32-LABEL: .int_va_arg:
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; set up fixed stack frame for incoming va_args r4->r10
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; ASM32-DAG: stw 4, 28(1)
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; ASM32-DAG: stw 5, 32(1)
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; ASM32-DAG: stw 6, 36(1)
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; ASM32-DAG: stw 7, 40(1)
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; ASM32-DAG: stw 8, 44(1)
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; ASM32-DAG: stw 9, 48(1)
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; ASM32-DAG: stw 10, 52(1)
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; load of arg1 from fixed stack offset
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; ASM32-DAG: lwz [[ARG1:[0-9]+]], 28(1)
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; va_copy load of arg2 from fixed stack offset
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; ASM32-DAG: lwz [[ARG2:[0-9]+]], 28(1)
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; ASM32-DAG: blr
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define i32 @int_stack_va_arg(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, ...) local_unnamed_addr {
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entry:
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%arg1 = alloca i8*, align 4
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%arg2 = alloca i8*, align 4
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%0 = bitcast i8** %arg1 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
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%1 = bitcast i8** %arg2 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
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call void @llvm.va_start(i8* nonnull %0)
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call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
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%add = add nsw i32 %two, %one
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%add2 = add nsw i32 %add, %three
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%add3 = add nsw i32 %add2, %four
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%add4 = add nsw i32 %add3, %five
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%add5 = add nsw i32 %add4, %six
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%add6 = add nsw i32 %add5, %seven
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%add7 = add nsw i32 %add6, %eight
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%argp.cur = load i8*, i8** %arg1, align 4
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%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
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store i8* %argp.next, i8** %arg1, align 4
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%2 = bitcast i8* %argp.cur to i32*
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%3 = load i32, i32* %2, align 4
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%add8 = add nsw i32 %add7, %3
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%argp.cur9 = load i8*, i8** %arg2, align 4
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%argp.next10 = getelementptr inbounds i8, i8* %argp.cur9, i32 4
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store i8* %argp.next10, i8** %arg2, align 4
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%4 = bitcast i8* %argp.cur9 to i32*
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%5 = load i32, i32* %4, align 4
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%mul = shl i32 %5, 1
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%add11 = add nsw i32 %add8, %mul
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call void @llvm.va_end(i8* nonnull %0)
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call void @llvm.va_end(i8* nonnull %1)
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call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
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call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
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ret i32 %add11
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}
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; 32BIT-LABEL: name: int_stack_va_arg
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; 32BIT-LABEL: liveins:
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; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
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; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
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; 32BIT-LABEL: fixedStack:
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; 32BIT-DAG: - { id: 0, type: default, offset: 56, size: 4
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; 32BIT-LABEL: stack:
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; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
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; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
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||||||
|
|
||||||
|
; 32BIT-LABEL: body: |
|
||||||
|
; 32BIT-DAG: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r7
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r8
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r9
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r10
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r4, killed renamable $r3
|
||||||
|
; 32BIT-DAG: renamable $r4 = ADDI %fixed-stack.0, 0
|
||||||
|
; 32BIT-DAG: STW killed renamable $r4, 0, %stack.0.arg1 :: (store 4 into %ir.arg1)
|
||||||
|
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r4
|
||||||
|
; 32BIT-DAG: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.4, align 8)
|
||||||
|
; 32BIT-DAG: renamable $r11 = LI 4
|
||||||
|
; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $r3
|
||||||
|
|
||||||
|
; ASM32-LABEL: .int_stack_va_arg:
|
||||||
|
; ASM32-DAG: add 3, 4, 3
|
||||||
|
; ASM32-DAG: add 3, 3, 5
|
||||||
|
; ASM32-DAG: add 3, 3, 6
|
||||||
|
; ASM32-DAG: add 3, 3, 7
|
||||||
|
; ASM32-DAG: add 3, 3, 8
|
||||||
|
; ASM32-DAG: add 3, 3, 9
|
||||||
|
; ASM32-DAG: add 3, 3, 10
|
||||||
|
; ASM32-DAG: lwz [[ARG1:[0-9]+]], 56(1)
|
||||||
|
; ASM32-DAG: li [[ARG2:[0-9]+]], [[ARG1]]
|
||||||
|
; ASM32-DAG: add 3, 3, [[ARG1:[0-9]+]]
|
||||||
|
; ASM32-DAG: add 3, 3, [[ARG2:[0-9]+]]
|
||||||
|
; ASM32-DAG: blr
|
||||||
|
|
||||||
|
define double @double_va_arg(double %a, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 4
|
||||||
|
%arg2 = alloca i8*, align 4
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%argp.cur = load i8*, i8** %arg1, align 4
|
||||||
|
%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 8
|
||||||
|
store i8* %argp.next, i8** %arg1, align 4
|
||||||
|
%2 = bitcast i8* %argp.cur to double*
|
||||||
|
%3 = load double, double* %2, align 4
|
||||||
|
%add = fadd double %3, %a
|
||||||
|
%argp.cur2 = load i8*, i8** %arg2, align 4
|
||||||
|
%argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 8
|
||||||
|
store i8* %argp.next3, i8** %arg2, align 4
|
||||||
|
%4 = bitcast i8* %argp.cur2 to double*
|
||||||
|
%5 = load double, double* %4, align 4
|
||||||
|
%mul = fmul double %5, 2.000000e+00
|
||||||
|
%add4 = fadd double %add, %mul
|
||||||
|
call void @llvm.va_end(i8* nonnull %0)
|
||||||
|
call void @llvm.va_end(i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
|
||||||
|
ret double %add4
|
||||||
|
}
|
||||||
|
|
||||||
|
; 32BIT-LABEL: name: double_va_arg
|
||||||
|
; 32BIT-LABEL: liveins:
|
||||||
|
; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 32BIT-LABEL: fixedStack:
|
||||||
|
; 32BIT-DAG: - { id: 0, type: default, offset: 32, size: 4
|
||||||
|
|
||||||
|
; 32BIT-LABEL: stack:
|
||||||
|
; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
|
||||||
|
; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
|
||||||
|
|
||||||
|
; 32BIT-LABEL: body: |
|
||||||
|
; 32BIT-DAG: liveins: $f1, $r5, $r6, $r7, $r8, $r9, $r10
|
||||||
|
; 32BIT-DAG: renamable $r3 = ADDI %fixed-stack.0, 0
|
||||||
|
; 32BIT-DAG: STW renamable $r5, 0, %fixed-stack.0 :: (store 4 into %fixed-stack.0, align 16)
|
||||||
|
; 32BIT-DAG: STW renamable $r6, 4, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 4)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r7, 8, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 8, align 8)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r8, 12, %fixed-stack.0 :: (store 4)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r9, 16, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 16, align 16)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r10, 20, %fixed-stack.0 :: (store 4)
|
||||||
|
; 32BIT-DAG: STW renamable $r3, 0, %stack.0.arg1 :: (store 4 into %ir.0)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r3, 0, %stack.1.arg2 :: (store 4 into %ir.1)
|
||||||
|
; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $f1
|
||||||
|
|
||||||
|
; ASM32-LABEL: .double_va_arg:
|
||||||
|
; ASM32-DAG: stw 5, 32(1)
|
||||||
|
; ASM32-DAG: stw 6, 36(1)
|
||||||
|
; ASM32-DAG: stw 7, 40(1)
|
||||||
|
; ASM32-DAG: stw 8, 44(1)
|
||||||
|
; ASM32-DAG: stw 9, 48(1)
|
||||||
|
; ASM32-DAG: stw 10, 52(1)
|
||||||
|
; ASM32-DAG: stw [[ARG1A:[0-9]+]], -12(1)
|
||||||
|
; ASM32-DAG: stw [[ARG1B:[0-9]+]], -16(1)
|
||||||
|
; ASM32-DAG: stw [[ARG2A:[0-9]+]], -20(1)
|
||||||
|
; ASM32-DAG: stw [[ARG2B:[0-9]+]], -24(1)
|
||||||
|
; ASM32-DAG: lfd [[ARG1:[0-9]+]], -16(1)
|
||||||
|
; ASM32-DAG: fadd 0, [[ARG1]], 1
|
||||||
|
; ASM32-DAG: fadd 1, 1, 1
|
||||||
|
; ASM32-DAG: lfd [[ARG2:[0-9]+]], -24(1)
|
||||||
|
; ASM32-DAG: fadd 1, 0, [[ARG2]]
|
||||||
|
; ASM32-DAG: blr
|
||||||
|
|
||||||
|
define double @double_stack_va_arg(double %one, double %two, double %three, double %four, double %five, double %six, double %seven, double %eight, double %nine, double %ten, double %eleven, double %twelve, double %thirteen, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 4
|
||||||
|
%arg2 = alloca i8*, align 4
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%add = fadd double %one, %two
|
||||||
|
%add2 = fadd double %add, %three
|
||||||
|
%add3 = fadd double %add2, %four
|
||||||
|
%add4 = fadd double %add3, %five
|
||||||
|
%add5 = fadd double %add4, %six
|
||||||
|
%add6 = fadd double %add5, %seven
|
||||||
|
%add7 = fadd double %add6, %eight
|
||||||
|
%add8 = fadd double %add7, %nine
|
||||||
|
%add9 = fadd double %add8, %ten
|
||||||
|
%add10 = fadd double %add9, %eleven
|
||||||
|
%add11 = fadd double %add10, %twelve
|
||||||
|
%add12 = fadd double %add11, %thirteen
|
||||||
|
%2 = bitcast i8** %arg1 to double**
|
||||||
|
%argp.cur1 = load double*, double** %2, align 4
|
||||||
|
%3 = load double, double* %argp.cur1, align 4
|
||||||
|
%add13 = fadd double %add12, %3
|
||||||
|
%4 = bitcast i8** %arg2 to double**
|
||||||
|
%argp.cur142 = load double*, double** %4, align 4
|
||||||
|
%5 = load double, double* %argp.cur142, align 4
|
||||||
|
%mul = fmul double %5, 2.000000e+00
|
||||||
|
%add16 = fadd double %add13, %mul
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
|
||||||
|
ret double %add16
|
||||||
|
}
|
||||||
|
|
||||||
|
; 32BIT-LABEL: name: double_stack_va_arg
|
||||||
|
; 32BIT-LABEL: liveins:
|
||||||
|
; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f2', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f3', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f4', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f5', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f6', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f7', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f8', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f9', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f10', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f11', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f12', virtual-reg: '' }
|
||||||
|
; 32BIT-DAG: - { reg: '$f13', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 32BIT-LABEL: fixedStack:
|
||||||
|
; 32BIT-DAG: - { id: 0, type: default, offset: 128, size: 4
|
||||||
|
|
||||||
|
; 32BIT-LABEL: stack:
|
||||||
|
; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4, alignment: 4,
|
||||||
|
; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4, alignment: 4,
|
||||||
|
; 32BIT-DAG: - { id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
|
||||||
|
; 32BIT-DAG: - { id: 3, name: '', type: default, offset: 0, size: 8, alignment: 8,
|
||||||
|
|
||||||
|
; 32BIT-LABEL: body: |
|
||||||
|
; 32BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
|
||||||
|
; 32BIT-DAG: renamable $r3 = ADDI %fixed-stack.0, 0
|
||||||
|
; 32BIT-DAG: STW killed renamable $r3, 0, %stack.0.arg1 :: (store 4 into %ir.0)
|
||||||
|
; 32BIT-DAG: renamable $r3 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.argp.cur142, align 16)
|
||||||
|
; 32BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
|
||||||
|
; 32BIT-DAG: renamable $r4 = LWZ 4, %fixed-stack.0 :: (load 4 from %ir.argp.cur1 + 4)
|
||||||
|
; 32BIT-DAG: STW renamable $r4, 4, %stack.2 :: (store 4 into %stack.2 + 4)
|
||||||
|
; 32BIT-DAG: renamable $f1 = LFD 0, %stack.2 :: (load 8 from %stack.2)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r3, 0, %stack.3 :: (store 4 into %stack.3, align 8)
|
||||||
|
; 32BIT-DAG: STW killed renamable $r4, 4, %stack.3 :: (store 4 into %stack.3 + 4)
|
||||||
|
; 32BIT-DAG: renamable $f2 = LFD 0, %stack.3 :: (load 8 from %stack.3)
|
||||||
|
; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
|
||||||
|
; 32BIT-DAG: STW renamable $r3, 0, %stack.2 :: (store 4 into %stack.2, align 8)
|
||||||
|
; 32BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
|
||||||
|
; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $f1
|
||||||
|
|
||||||
|
; ASM32-LABEL: .double_stack_va_arg:
|
||||||
|
; ASM32-DAG: fadd 0, 1, 2
|
||||||
|
; ASM32-DAG: fadd 0, 0, 3
|
||||||
|
; ASM32-DAG: fadd 0, 0, 4
|
||||||
|
; ASM32-DAG: fadd 0, 0, 5
|
||||||
|
; ASM32-DAG: fadd 0, 0, 6
|
||||||
|
; ASM32-DAG: fadd 0, 0, 7
|
||||||
|
; ASM32-DAG: fadd 0, 0, 8
|
||||||
|
; ASM32-DAG: fadd 0, 0, 9
|
||||||
|
; ASM32-DAG: fadd 0, 0, 10
|
||||||
|
; ASM32-DAG: fadd 0, 0, 11
|
||||||
|
; ASM32-DAG: fadd 0, 0, 12
|
||||||
|
; ASM32-DAG: fadd 0, 0, 13
|
||||||
|
; ASM32-DAG: lwz [[ARG1:[0-9]+]], 128(1)
|
||||||
|
; ASM32-DAG: lwz [[ARG2:[0-9]+]], 132(1)
|
||||||
|
; ASM32-DAG: lfd [[ARG1:[0-9]+]], -16(1)
|
||||||
|
; ASM32-DAG: lfd [[ARG2:[0-9]+]], -24(1)
|
||||||
|
; ASM32-DAG: fadd 0, 0, [[ARG1]]
|
||||||
|
; ASM32-DAG: fadd [[ARG1]], 0, [[ARG2]]
|
||||||
|
; ASM32-DAG: blr
|
||||||
|
|
@ -0,0 +1,357 @@
|
||||||
|
; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
|
||||||
|
; RUN: FileCheck --check-prefixes=CHECK,64BIT %s
|
||||||
|
|
||||||
|
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
|
||||||
|
; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
|
||||||
|
; RUN: FileCheck --check-prefixes=CHECKASM,ASM64 %s
|
||||||
|
|
||||||
|
define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 8
|
||||||
|
%arg2 = alloca i8*, align 8
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%2 = va_arg i8** %arg1, i32
|
||||||
|
%add = add nsw i32 %2, %a
|
||||||
|
%3 = va_arg i8** %arg2, i32
|
||||||
|
%mul = shl i32 %3, 1
|
||||||
|
%add3 = add nsw i32 %add, %mul
|
||||||
|
call void @llvm.va_end(i8* nonnull %0)
|
||||||
|
call void @llvm.va_end(i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
ret i32 %add3
|
||||||
|
}
|
||||||
|
|
||||||
|
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
|
||||||
|
declare void @llvm.va_start(i8*)
|
||||||
|
declare void @llvm.va_copy(i8*, i8*)
|
||||||
|
declare void @llvm.va_end(i8*)
|
||||||
|
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
|
||||||
|
|
||||||
|
; 64BIT-LABEL: name: int_va_arg
|
||||||
|
; 64BIT-LABEL: liveins:
|
||||||
|
; 64BIT-DAG: - { reg: '$x3', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 64BIT-LABEL: fixedStack:
|
||||||
|
; 64BIT-DAG: - { id: 0, type: default, offset: 56, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: stack:
|
||||||
|
; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8
|
||||||
|
; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: body: |
|
||||||
|
; 64BIT-DAG: bb.0.entry:
|
||||||
|
; 64BIT-DAG: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
|
||||||
|
; 64BIT-DAG: STD killed renamable $x4, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x5, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x6, 16, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x7, 24, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x8, 32, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x9, 40, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x10, 48, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: renamable $x11 = ADDI8 %fixed-stack.0, 0
|
||||||
|
; 64BIT-DAG: STD renamable $x11, 0, %stack.1.arg2 :: (store 8 into %ir.1)
|
||||||
|
; 64BIT-DAG: renamable $x4 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
|
||||||
|
; 64BIT-DAG: renamable $x7 = ADDI8 renamable $x4, 4
|
||||||
|
; 64BIT-DAG: renamable $x5 = ADDI8 %fixed-stack.0, 4
|
||||||
|
; 64BIT-DAG: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load 4 from %fixed-stack.0, align 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x11, 0, %stack.0.arg1 :: (store 8 into %ir.0)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x5, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x7, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
|
||||||
|
; 64BIT-DAG: renamable $r4 = LWZ 0, killed renamable $x4 :: (load 4)
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r6, renamable $r3, implicit killed $x3
|
||||||
|
; 64BIT-DAG: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4, implicit-def $x3
|
||||||
|
; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $x3
|
||||||
|
|
||||||
|
; ASM64-LABEL: .int_va_arg:
|
||||||
|
; ASM64-DAG: std 4, 56(1)
|
||||||
|
; ASM64-DAG: addi 4, 1, 56
|
||||||
|
; ASM64-DAG: std 4, -16(1)
|
||||||
|
; ASM64-DAG: std 4, -8(1)
|
||||||
|
; ASM64-DAG: ld 4, -16(1)
|
||||||
|
; ASM64-DAG: std 5, 64(1)
|
||||||
|
; ASM64-DAG: addi 5, 1, 60
|
||||||
|
; ASM64-DAG: std 5, -8(1)
|
||||||
|
; ASM64-DAG: addi 5, 4, 4
|
||||||
|
; ASM64-DAG: std 6, 72(1)
|
||||||
|
; ASM64-DAG: std 7, 80(1)
|
||||||
|
; ASM64-DAG: std 8, 88(1)
|
||||||
|
; ASM64-DAG: std 9, 96(1)
|
||||||
|
; ASM64-DAG: std 10, 104(1)
|
||||||
|
; ASM64-DAG: std 5, -16(1)
|
||||||
|
; ASM64-DAG: lwz 11, 56(1)
|
||||||
|
; ASM64-DAG: lwz 4, 0(4)
|
||||||
|
; ASM64-DAG: add 3, 11, 3
|
||||||
|
; ASM64-DAG: slwi 4, 4, 1
|
||||||
|
; ASM64-DAG: add 3, 3, 4
|
||||||
|
; ASM64-DAG: blr
|
||||||
|
|
||||||
|
define i32 @int_stack_va_arg(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 8
|
||||||
|
%arg2 = alloca i8*, align 8
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%add = add nsw i32 %two, %one
|
||||||
|
%add2 = add nsw i32 %add, %three
|
||||||
|
%add3 = add nsw i32 %add2, %four
|
||||||
|
%add4 = add nsw i32 %add3, %five
|
||||||
|
%add5 = add nsw i32 %add4, %six
|
||||||
|
%add6 = add nsw i32 %add5, %seven
|
||||||
|
%add7 = add nsw i32 %add6, %eight
|
||||||
|
%2 = va_arg i8** %arg1, i32
|
||||||
|
%add8 = add nsw i32 %add7, %2
|
||||||
|
%3 = va_arg i8** %arg2, i32
|
||||||
|
%mul = shl i32 %3, 1
|
||||||
|
%add10 = add nsw i32 %add8, %mul
|
||||||
|
call void @llvm.va_end(i8* nonnull %0)
|
||||||
|
call void @llvm.va_end(i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
ret i32 %add10
|
||||||
|
}
|
||||||
|
|
||||||
|
; 64BIT-LABEL: name: int_stack_va_arg
|
||||||
|
; 64BIT-LABEL: liveins:
|
||||||
|
; 64BIT-DAG: - { reg: '$x3', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 64BIT-LABEL: fixedStack:
|
||||||
|
; 64BIT-DAG: - { id: 0, type: default, offset: 112, size: 8, alignment: 16, stack-id: default,
|
||||||
|
|
||||||
|
; 64BIT-LABEL: stack:
|
||||||
|
; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8, alignment: 8,
|
||||||
|
; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8, alignment: 8,
|
||||||
|
|
||||||
|
; 64BIT-LABEL: body: |
|
||||||
|
; 64BIT-DAG: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
|
||||||
|
; 64BIT-DAG: renamable $r11 = LWZ 0, %fixed-stack.0 :: (load 4 from %fixed-stack.0, align 16)
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 renamable $r4, renamable $r3, implicit killed $x3, implicit killed $x4
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r7, implicit killed $x7
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r8, implicit killed $x8
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r9, implicit killed $x9
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r10, implicit killed $x10
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r11
|
||||||
|
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4, implicit-def $x3
|
||||||
|
; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $x3
|
||||||
|
|
||||||
|
; ASM64-LABEL: .int_stack_va_arg:
|
||||||
|
; ASM64-DAG: add 3, 4, 3
|
||||||
|
; ASM64-DAG: add 3, 3, 5
|
||||||
|
; ASM64-DAG: add 3, 3, 6
|
||||||
|
; ASM64-DAG: add 3, 3, 7
|
||||||
|
; ASM64-DAG: add 3, 3, 8
|
||||||
|
; ASM64-DAG: add 3, 3, 9
|
||||||
|
; ASM64-DAG: add 3, 3, 10
|
||||||
|
; ASM64-DAG: lwz 11, 112(1)
|
||||||
|
; ASM64-DAG: slwi 4, 11, 1
|
||||||
|
; ASM64-DAG: add 3, 3, 11
|
||||||
|
; ASM64-DAG: add 3, 3, 4
|
||||||
|
; ASM64-DAG: blr
|
||||||
|
|
||||||
|
define double @double_va_arg(double %a, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 8
|
||||||
|
%arg2 = alloca i8*, align 8
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%2 = va_arg i8** %arg1, double
|
||||||
|
%add = fadd double %2, %a
|
||||||
|
%3 = va_arg i8** %arg2, double
|
||||||
|
%mul = fmul double %3, 2.000000e+00
|
||||||
|
%add3 = fadd double %add, %mul
|
||||||
|
call void @llvm.va_end(i8* nonnull %0)
|
||||||
|
call void @llvm.va_end(i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
ret double %add3
|
||||||
|
}
|
||||||
|
|
||||||
|
; 64BIT-LABEL: name: double_va_arg
|
||||||
|
; 64BIT-LABEL: liveins:
|
||||||
|
; 64BIT-DAG: - { reg: '$f1', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 64BIT-LABEL: fixedStack:
|
||||||
|
; 64BIT-DAG: - { id: 0, type: default, offset: 56, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: stack:
|
||||||
|
; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8
|
||||||
|
; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: body: |
|
||||||
|
; 64BIT-DAG: liveins: $f1, $x4, $x5, $x6, $x7, $x8, $x9, $x10
|
||||||
|
; 64BIT-DAG: renamable $x3 = ADDI8 %fixed-stack.0, 0
|
||||||
|
; 64BIT-DAG: STD killed renamable $x4, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x5, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x6, 16, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x7, 24, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x8, 32, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x9, 40, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x10, 48, %fixed-stack.0 :: (store 8)
|
||||||
|
; 64BIT-DAG: STD renamable $x3, 0, %stack.1.arg2 :: (store 8 into %ir.1)
|
||||||
|
; 64BIT-DAG: renamable $x4 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
|
||||||
|
; 64BIT-DAG: renamable $x5 = ADDI8 %fixed-stack.0, 8
|
||||||
|
; 64BIT-DAG: STD killed renamable $x3, 0, %stack.0.arg1 :: (store 8 into %ir.0)
|
||||||
|
; 64BIT-DAG: STD killed renamable $x5, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
|
||||||
|
; 64BIT-DAG: renamable $f0 = LFD 0, %fixed-stack.0 :: (load 8)
|
||||||
|
; 64BIT-DAG: renamable $x3 = ADDI8 renamable $x4, 8
|
||||||
|
; 64BIT-DAG: STD killed renamable $x3, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
|
||||||
|
; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x4 :: (load 8)
|
||||||
|
; 64BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
|
||||||
|
; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $f1
|
||||||
|
|
||||||
|
; ASM64-LABEL: .double_va_arg:
|
||||||
|
; ASM64-DAG: addi 3, 1, 56
|
||||||
|
; ASM64-DAG: std 4, 56(1)
|
||||||
|
; ASM64-DAG: std 3, -8(1)
|
||||||
|
; ASM64-DAG: std 3, -16(1)
|
||||||
|
; ASM64-DAG: addi 3, 1, 64
|
||||||
|
; ASM64-DAG: std 3, -8(1)
|
||||||
|
; ASM64-DAG: ld 3, -16(1)
|
||||||
|
; ASM64-DAG: lfd 0, 56(1)
|
||||||
|
; ASM64-DAG: addi 4, 3, 8
|
||||||
|
; ASM64-DAG: std 5, 64(1)
|
||||||
|
; ASM64-DAG: fadd 0, 0, 1
|
||||||
|
; ASM64-DAG: std 6, 72(1)
|
||||||
|
; ASM64-DAG: std 7, 80(1)
|
||||||
|
; ASM64-DAG: std 8, 88(1)
|
||||||
|
; ASM64-DAG: std 9, 96(1)
|
||||||
|
; ASM64-DAG: std 10, 104(1)
|
||||||
|
; ASM64-DAG: std 4, -16(1)
|
||||||
|
; ASM64-DAG: lfd 1, 0(3)
|
||||||
|
; ASM64-DAG: fadd 1, 1, 1
|
||||||
|
; ASM64-DAG: fadd 1, 0, 1
|
||||||
|
; ASM64-DAG: blr
|
||||||
|
|
||||||
|
define double @double_stack_va_arg(double %one, double %two, double %three, double %four, double %five, double %six, double %seven, double %eight, double %nine, double %ten, double %eleven, double %twelve, double %thirteen, ...) local_unnamed_addr {
|
||||||
|
entry:
|
||||||
|
%arg1 = alloca i8*, align 8
|
||||||
|
%arg2 = alloca i8*, align 8
|
||||||
|
%0 = bitcast i8** %arg1 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
%1 = bitcast i8** %arg2 to i8*
|
||||||
|
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.va_start(i8* nonnull %0)
|
||||||
|
call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
|
||||||
|
%add = fadd double %one, %two
|
||||||
|
%add2 = fadd double %add, %three
|
||||||
|
%add3 = fadd double %add2, %four
|
||||||
|
%add4 = fadd double %add3, %five
|
||||||
|
%add5 = fadd double %add4, %six
|
||||||
|
%add6 = fadd double %add5, %seven
|
||||||
|
%add7 = fadd double %add6, %eight
|
||||||
|
%add8 = fadd double %add7, %nine
|
||||||
|
%add9 = fadd double %add8, %ten
|
||||||
|
%add10 = fadd double %add9, %eleven
|
||||||
|
%add11 = fadd double %add10, %twelve
|
||||||
|
%add12 = fadd double %add11, %thirteen
|
||||||
|
%2 = va_arg i8** %arg1, double
|
||||||
|
%add13 = fadd double %add12, %2
|
||||||
|
%3 = va_arg i8** %arg2, double
|
||||||
|
%mul = fmul double %3, 2.000000e+00
|
||||||
|
%add15 = fadd double %add13, %mul
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
|
||||||
|
call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
|
||||||
|
ret double %add15
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
; 64BIT-LABEL: name: double_stack_va_arg
|
||||||
|
; 64BIT-LABEL: liveins:
|
||||||
|
; 64BIT-DAG: - { reg: '$f1', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f2', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f3', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f4', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f5', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f6', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f7', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f8', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f9', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f10', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f11', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f12', virtual-reg: '' }
|
||||||
|
; 64BIT-DAG: - { reg: '$f13', virtual-reg: '' }
|
||||||
|
|
||||||
|
; 64BIT-LABEL: fixedStack:
|
||||||
|
; 64BIT-DAG: - { id: 0, type: default, offset: 152, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: stack:
|
||||||
|
; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8
|
||||||
|
; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8
|
||||||
|
|
||||||
|
; 64BIT-LABEL: body: |
|
||||||
|
; 64BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
|
||||||
|
; 64BIT-DAG: renamable $f0 = LFD 0, %fixed-stack.0 :: (load 8)
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f5, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f6, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f7, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f8, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f9, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f10, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f11, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f12, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f13, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, renamable $f0, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, renamable $f0, implicit $rm
|
||||||
|
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f0, implicit $rm
|
||||||
|
; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $f1
|
||||||
|
|
||||||
|
; ASM64-LABEL: .double_stack_va_arg:
|
||||||
|
; ASM64-DAG: fadd 1, 1, 2
|
||||||
|
; ASM64-DAG: fadd 1, 1, 3
|
||||||
|
; ASM64-DAG: fadd 1, 1, 4
|
||||||
|
; ASM64-DAG: fadd 1, 1, 5
|
||||||
|
; ASM64-DAG: fadd 1, 1, 6
|
||||||
|
; ASM64-DAG: fadd 1, 1, 7
|
||||||
|
; ASM64-DAG: fadd 1, 1, 8
|
||||||
|
; ASM64-DAG: fadd 1, 1, 9
|
||||||
|
; ASM64-DAG: fadd 1, 1, 10
|
||||||
|
; ASM64-DAG: fadd 1, 1, 11
|
||||||
|
; ASM64-DAG: fadd 1, 1, 12
|
||||||
|
; ASM64-DAG: fadd 1, 1, 13
|
||||||
|
; ASM64-DAG: lfd 0, 152(1)
|
||||||
|
; ASM64-DAG: fadd 1, 1, 0
|
||||||
|
; ASM64-DAG: fadd 0, 0, 0
|
||||||
|
; ASM64-DAG: fadd 1, 1, 0
|
||||||
|
; ASM64-DAG: blr
|
||||||
Loading…
Reference in New Issue