forked from OSchip/llvm-project
Big-endian version of vpermxor
A big-endian version of vpermxor, named vpermxor_be, is added to LLVM and Clang. vpermxor_be can be called directly on both the little-endian and the big-endian platforms. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D114540
This commit is contained in:
Tarique Islam
Wael Yehia
parent
858eb8fc11
commit
0850655da6
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@ -404,6 +404,7 @@ BUILTIN(__builtin_altivec_vbpermd, "V2ULLiV2ULLiV16Uc", "")
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// P8 Crypto built-ins.
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BUILTIN(__builtin_altivec_crypto_vsbox, "V2ULLiV2ULLi", "")
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BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "")
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BUILTIN(__builtin_altivec_crypto_vpermxor_be, "V16UcV16UcV16UcV16Uc", "")
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BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "")
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BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "")
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BUILTIN(__builtin_altivec_crypto_vcipher, "V2ULLiV2ULLiV2ULLi", "")
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@ -132,6 +132,62 @@ vector unsigned char test_vpermxoruc(vector unsigned char a,
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor
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}
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// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxorb_be
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vector unsigned char test_vpermxorb_be(vector unsigned char a,
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vector unsigned char b,
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vector unsigned char c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <8 x i16> @test_vpermxorh_be
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vector unsigned short test_vpermxorh_be(vector unsigned short a,
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vector unsigned short b,
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vector unsigned short c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <4 x i32> @test_vpermxorw_be
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vector unsigned int test_vpermxorw_be(vector unsigned int a,
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vector unsigned int b,
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vector unsigned int c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <2 x i64> @test_vpermxord_be
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vector unsigned long long test_vpermxord_be(vector unsigned long long a,
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vector unsigned long long b,
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vector unsigned long long c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxorbc_be
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vector bool char test_vpermxorbc_be(vector bool char a,
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vector bool char b,
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vector bool char c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxorsc_be
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vector signed char test_vpermxorsc_be(vector signed char a,
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vector signed char b,
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vector signed char c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxoruc_be
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vector unsigned char test_vpermxoruc_be(vector unsigned char a,
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vector unsigned char b,
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vector unsigned char c) {
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return __builtin_altivec_crypto_vpermxor_be(a, b, c);
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// CHECK: @llvm.ppc.altivec.crypto.vpermxor.be
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}
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// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcipher
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vector unsigned long long test_vcipher(void)
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{
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@ -1087,6 +1087,10 @@ let TargetPrefix = "ppc" in { // All PPC intrinsics start with "llvm.ppc.".
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GCCBuiltin<"__builtin_altivec_crypto_vpermxor">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
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llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
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def int_ppc_altivec_crypto_vpermxor_be :
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GCCBuiltin<"__builtin_altivec_crypto_vpermxor_be">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
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llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
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def int_ppc_altivec_crypto_vshasigmad :
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GCCBuiltin<"__builtin_altivec_crypto_vshasigmad">,
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@ -2471,6 +2471,7 @@ def DblwdCmp {
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// [HasVSX, HasP8Vector, IsLittleEndian]
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// [HasVSX, HasP8Vector, NoP9Vector, IsBigEndian, IsPPC64]
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// [HasVSX, HasP8Vector, NoP9Vector, IsLittleEndian]
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// [HasVSX, HasP8Altivec]
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// [HasVSX, HasDirectMove]
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// [HasVSX, HasDirectMove, IsBigEndian]
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// [HasVSX, HasDirectMove, IsLittleEndian]
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@ -2500,6 +2501,10 @@ let Predicates = [HasVSX, IsBigEndian, HasP8Altivec] in
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def : Pat<(v16i8 (int_ppc_altivec_crypto_vpermxor v16i8:$a,
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v16i8:$b, v16i8:$c)),
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(v16i8 (VPERMXOR $a, $b, $c))>;
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let Predicates = [HasVSX, HasP8Altivec] in
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def : Pat<(v16i8 (int_ppc_altivec_crypto_vpermxor_be v16i8:$a,
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v16i8:$b, v16i8:$c)),
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(v16i8 (VPERMXOR $a, $b, $c))>;
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let AddedComplexity = 400 in {
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// Valid for any VSX subtarget, regardless of endianness.
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@ -0,0 +1,165 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefixes=CHECK-LE-P8
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefixes=CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefixes=CHECK-BE-P8
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define <16 x i8> @test_vpermxorb() local_unnamed_addr {
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; CHECK-LE-P8-LABEL: test_vpermxorb:
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; CHECK-LE-P8: # %bb.0: # %entry
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; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
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; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI0_1@toc@ha
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; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l
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; CHECK-LE-P8-NEXT: lvx 2, 0, 3
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; CHECK-LE-P8-NEXT: addi 3, 4, .LCPI0_1@toc@l
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; CHECK-LE-P8-NEXT: lvx 3, 0, 3
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; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-LE-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: test_vpermxorb:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: addis 3, 2, .LCPI0_0@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI0_0@toc@l
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; CHECK-P9-NEXT: lxv 34, 0(3)
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; CHECK-P9-NEXT: addis 3, 2, .LCPI0_1@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI0_1@toc@l
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; CHECK-P9-NEXT: lxv 35, 0(3)
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; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-BE-P8-LABEL: test_vpermxorb:
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; CHECK-BE-P8: # %bb.0: # %entry
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; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
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; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI0_1@toc@ha
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; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l
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; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI0_1@toc@l
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; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
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; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
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; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-BE-P8-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16>, <16 x i8> <i8 113, i8 114, i8 115, i8 116, i8 117, i8 118, i8 119, i8 120, i8 121, i8 122, i8 123, i8 124, i8 125, i8 126, i8 127, i8 112>, <16 x i8> <i8 113, i8 114, i8 115, i8 116, i8 117, i8 118, i8 119, i8 120, i8 121, i8 122, i8 123, i8 124, i8 125, i8 126, i8 127, i8 112>)
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ret <16 x i8> %0
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}
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declare <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8>, <16 x i8>, <16 x i8>)
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define <8 x i16> @test_vpermxorh() local_unnamed_addr {
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; CHECK-LE-P8-LABEL: test_vpermxorh:
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; CHECK-LE-P8: # %bb.0: # %entry
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; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
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; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI1_1@toc@ha
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; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l
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; CHECK-LE-P8-NEXT: lvx 2, 0, 3
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; CHECK-LE-P8-NEXT: addi 3, 4, .LCPI1_1@toc@l
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; CHECK-LE-P8-NEXT: lvx 3, 0, 3
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; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-LE-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: test_vpermxorh:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: addis 3, 2, .LCPI1_0@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI1_0@toc@l
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; CHECK-P9-NEXT: lxv 34, 0(3)
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; CHECK-P9-NEXT: addis 3, 2, .LCPI1_1@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI1_1@toc@l
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; CHECK-P9-NEXT: lxv 35, 0(3)
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; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-BE-P8-LABEL: test_vpermxorh:
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; CHECK-BE-P8: # %bb.0: # %entry
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; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
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; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI1_1@toc@ha
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; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l
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; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI1_1@toc@l
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; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
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; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
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; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-BE-P8-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 2, i8 1, i8 4, i8 3, i8 6, i8 5, i8 8, i8 7, i8 10, i8 9, i8 12, i8 11, i8 14, i8 13, i8 16, i8 15>, <16 x i8> <i8 114, i8 113, i8 116, i8 115, i8 118, i8 117, i8 120, i8 119, i8 122, i8 121, i8 124, i8 123, i8 126, i8 125, i8 112, i8 127>, <16 x i8> <i8 114, i8 113, i8 116, i8 115, i8 118, i8 117, i8 120, i8 119, i8 122, i8 121, i8 124, i8 123, i8 126, i8 125, i8 112, i8 127>)
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%1 = bitcast <16 x i8> %0 to <8 x i16>
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ret <8 x i16> %1
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}
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define <4 x i32> @test_vpermxorw() local_unnamed_addr {
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; CHECK-LE-P8-LABEL: test_vpermxorw:
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; CHECK-LE-P8: # %bb.0: # %entry
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; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha
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; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI2_1@toc@ha
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; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l
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; CHECK-LE-P8-NEXT: lvx 2, 0, 3
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; CHECK-LE-P8-NEXT: addi 3, 4, .LCPI2_1@toc@l
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; CHECK-LE-P8-NEXT: lvx 3, 0, 3
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; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-LE-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: test_vpermxorw:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: addis 3, 2, .LCPI2_0@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI2_0@toc@l
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; CHECK-P9-NEXT: lxv 34, 0(3)
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; CHECK-P9-NEXT: addis 3, 2, .LCPI2_1@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI2_1@toc@l
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; CHECK-P9-NEXT: lxv 35, 0(3)
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; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-BE-P8-LABEL: test_vpermxorw:
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; CHECK-BE-P8: # %bb.0: # %entry
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; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha
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; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI2_1@toc@ha
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; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l
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; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI2_1@toc@l
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; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
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; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
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; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-BE-P8-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 4, i8 3, i8 2, i8 1, i8 8, i8 7, i8 6, i8 5, i8 12, i8 11, i8 10, i8 9, i8 16, i8 15, i8 14, i8 13>, <16 x i8> <i8 116, i8 115, i8 114, i8 113, i8 120, i8 119, i8 118, i8 117, i8 124, i8 123, i8 122, i8 121, i8 112, i8 127, i8 126, i8 125>, <16 x i8> <i8 116, i8 115, i8 114, i8 113, i8 120, i8 119, i8 118, i8 117, i8 124, i8 123, i8 122, i8 121, i8 112, i8 127, i8 126, i8 125>)
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%1 = bitcast <16 x i8> %0 to <4 x i32>
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ret <4 x i32> %1
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}
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define <2 x i64> @test_vpermxord() local_unnamed_addr {
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; CHECK-LE-P8-LABEL: test_vpermxord:
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; CHECK-LE-P8: # %bb.0: # %entry
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; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
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; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI3_1@toc@ha
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; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l
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; CHECK-LE-P8-NEXT: lvx 2, 0, 3
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; CHECK-LE-P8-NEXT: addi 3, 4, .LCPI3_1@toc@l
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; CHECK-LE-P8-NEXT: lvx 3, 0, 3
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; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-LE-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: test_vpermxord:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: addis 3, 2, .LCPI3_0@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI3_0@toc@l
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; CHECK-P9-NEXT: lxv 34, 0(3)
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; CHECK-P9-NEXT: addis 3, 2, .LCPI3_1@toc@ha
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; CHECK-P9-NEXT: addi 3, 3, .LCPI3_1@toc@l
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; CHECK-P9-NEXT: lxv 35, 0(3)
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; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-BE-P8-LABEL: test_vpermxord:
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; CHECK-BE-P8: # %bb.0: # %entry
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; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
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; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI3_1@toc@ha
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; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l
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; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI3_1@toc@l
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; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
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; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
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; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
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; CHECK-BE-P8-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9>, <16 x i8> <i8 120, i8 119, i8 118, i8 117, i8 116, i8 115, i8 114, i8 113, i8 112, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121>, <16 x i8> <i8 120, i8 119, i8 118, i8 117, i8 116, i8 115, i8 114, i8 113, i8 112, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121>)
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%1 = bitcast <16 x i8> %0 to <2 x i64>
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ret <2 x i64> %1
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}
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