forked from OSchip/llvm-project
Use llvm::StringLiteral instead of StringRef in few places
llvm-svn: 372395
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@ -197,18 +197,12 @@ static bool handleAttr(Function &Parent, const Function &Callee,
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static void copyFeaturesToFunction(Function &Parent, const Function &Callee,
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bool &NeedQueuePtr) {
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// X ids unnecessarily propagated to kernels.
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static const StringRef AttrNames[] = {
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{ "amdgpu-work-item-id-x" },
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{ "amdgpu-work-item-id-y" },
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{ "amdgpu-work-item-id-z" },
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{ "amdgpu-work-group-id-x" },
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{ "amdgpu-work-group-id-y" },
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{ "amdgpu-work-group-id-z" },
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{ "amdgpu-dispatch-ptr" },
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{ "amdgpu-dispatch-id" },
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{ "amdgpu-kernarg-segment-ptr" },
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{ "amdgpu-implicitarg-ptr" }
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};
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static constexpr StringLiteral AttrNames[] = {
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"amdgpu-work-item-id-x", "amdgpu-work-item-id-y",
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"amdgpu-work-item-id-z", "amdgpu-work-group-id-x",
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"amdgpu-work-group-id-y", "amdgpu-work-group-id-z",
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"amdgpu-dispatch-ptr", "amdgpu-dispatch-id",
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"amdgpu-kernarg-segment-ptr", "amdgpu-implicitarg-ptr"};
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if (handleAttr(Parent, Callee, "amdgpu-queue-ptr"))
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NeedQueuePtr = true;
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@ -2017,13 +2017,7 @@ bool AMDGPUAsmParser::AddNextRegisterToList(unsigned &Reg, unsigned &RegWidth,
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}
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}
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static const StringRef Registers[] = {
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{ "v" },
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{ "s" },
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{ "ttmp" },
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{ "acc" },
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{ "a" },
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};
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static constexpr StringLiteral Registers[] = {"v", "s", "ttmp", "acc", "a"};
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bool
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AMDGPUAsmParser::isRegister(const AsmToken &Token,
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@ -108,7 +108,7 @@ bool X86InsertPrefetch::findPrefetchInfo(const FunctionSamples *TopSamples,
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Prefetches &Prefetches) const {
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assert(Prefetches.empty() &&
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"Expected caller passed empty PrefetchInfo vector.");
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static const std::pair<const StringRef, unsigned> HintTypes[] = {
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static constexpr std::pair<StringLiteral, unsigned> HintTypes[] = {
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{"_nta_", X86::PREFETCHNTA},
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{"_t0_", X86::PREFETCHT0},
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{"_t1_", X86::PREFETCHT1},
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