[Polly][Isl] Use isl::*::ctx instead of isl::*::get_ctx. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Use `isl::*::ctx()` instead of `isl::*::get_ctx()` (for example `isl::space::ctx()` instead of `isl::space::get_ctx()`)
 - Add `isl::` namespace in front of isl types to avoid confusion (for example `isl::space::ctx` and `isl::ctx`
 - `isl-noexceptions.h` has been generated by this b64e33c62d

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D105691
This commit is contained in:
Riccardo Mori 2021-07-09 20:10:57 +02:00
parent 768e3af634
commit 0813bd1696
12 changed files with 3955 additions and 3957 deletions

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@ -34,14 +34,14 @@ inline isl::pw_aff operator+(isl::pw_aff Left, isl::val ValRight) {
}
inline isl::pw_aff operator+(long IntLeft, isl::pw_aff Right) {
isl::ctx Ctx = Right.get_ctx();
isl::ctx Ctx = Right.ctx();
isl::val ValLeft(Ctx, IntLeft);
isl::pw_aff Left(Right.domain(), ValLeft);
return Left.add(Right);
}
inline isl::pw_aff operator+(isl::pw_aff Left, long IntRight) {
isl::ctx Ctx = Left.get_ctx();
isl::ctx Ctx = Left.ctx();
isl::val ValRight(Ctx, IntRight);
isl::pw_aff Right(Left.domain(), ValRight);
return Left.add(Right);
@ -65,14 +65,14 @@ inline isl::pw_aff operator*(isl::pw_aff Left, isl::val ValRight) {
}
inline isl::pw_aff operator*(long IntLeft, isl::pw_aff Right) {
isl::ctx Ctx = Right.get_ctx();
isl::ctx Ctx = Right.ctx();
isl::val ValLeft(Ctx, IntLeft);
isl::pw_aff Left(Right.domain(), ValLeft);
return Left.mul(Right);
}
inline isl::pw_aff operator*(isl::pw_aff Left, long IntRight) {
isl::ctx Ctx = Left.get_ctx();
isl::ctx Ctx = Left.ctx();
isl::val ValRight(Ctx, IntRight);
isl::pw_aff Right(Left.domain(), ValRight);
return Left.mul(Right);
@ -96,14 +96,14 @@ inline isl::pw_aff operator-(isl::pw_aff Left, isl::val ValRight) {
}
inline isl::pw_aff operator-(long IntLeft, isl::pw_aff Right) {
isl::ctx Ctx = Right.get_ctx();
isl::ctx Ctx = Right.ctx();
isl::val ValLeft(Ctx, IntLeft);
isl::pw_aff Left(Right.domain(), ValLeft);
return Left.sub(Right);
}
inline isl::pw_aff operator-(isl::pw_aff Left, long IntRight) {
isl::ctx Ctx = Left.get_ctx();
isl::ctx Ctx = Left.ctx();
isl::val ValRight(Ctx, IntRight);
isl::pw_aff Right(Left.domain(), ValRight);
return Left.sub(Right);
@ -130,14 +130,14 @@ inline isl::pw_aff operator/(isl::pw_aff Left, isl::val ValRight) {
}
inline isl::pw_aff operator/(long IntLeft, isl::pw_aff Right) {
isl::ctx Ctx = Right.get_ctx();
isl::ctx Ctx = Right.ctx();
isl::val ValLeft(Ctx, IntLeft);
isl::pw_aff Left(Right.domain(), ValLeft);
return Left.tdiv_q(Right);
}
inline isl::pw_aff operator/(isl::pw_aff Left, long IntRight) {
isl::ctx Ctx = Left.get_ctx();
isl::ctx Ctx = Left.ctx();
isl::val ValRight(Ctx, IntRight);
isl::pw_aff Right(Left.domain(), ValRight);
return Left.tdiv_q(Right);
@ -165,14 +165,14 @@ inline isl::pw_aff operator%(isl::pw_aff Left, isl::val ValRight) {
}
inline isl::pw_aff operator%(long IntLeft, isl::pw_aff Right) {
isl::ctx Ctx = Right.get_ctx();
isl::ctx Ctx = Right.ctx();
isl::val ValLeft(Ctx, IntLeft);
isl::pw_aff Left(Right.domain(), ValLeft);
return Left.tdiv_r(Right);
}
inline isl::pw_aff operator%(isl::pw_aff Left, long IntRight) {
isl::ctx Ctx = Left.get_ctx();
isl::ctx Ctx = Left.ctx();
isl::val ValRight(Ctx, IntRight);
isl::pw_aff Right(Left.domain(), ValRight);
return Left.tdiv_r(Right);

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@ -172,7 +172,7 @@ static cl::list<std::string> IslArgs("polly-isl-arg",
static isl::set addRangeBoundsToSet(isl::set S, const ConstantRange &Range,
int dim, isl::dim type) {
isl::val V;
isl::ctx Ctx = S.get_ctx();
isl::ctx Ctx = S.ctx();
// The upper and lower bound for a parameter value is derived either from
// the data type of the parameter or from the - possibly more restrictive -
@ -253,7 +253,7 @@ ScopArrayInfo::ScopArrayInfo(Value *BasePtr, Type *ElementType, isl::ctx Ctx,
ScopArrayInfo::~ScopArrayInfo() = default;
isl::space ScopArrayInfo::getSpace() const {
auto Space = isl::space(Id.get_ctx(), 0, getNumberOfDimensions());
auto Space = isl::space(Id.ctx(), 0, getNumberOfDimensions());
Space = Space.set_tuple_id(isl::dim::set, Id);
return Space;
}
@ -418,7 +418,7 @@ const ScopArrayInfo *ScopArrayInfo::getFromId(isl::id Id) {
void MemoryAccess::wrapConstantDimensions() {
auto *SAI = getScopArrayInfo();
isl::space ArraySpace = SAI->getSpace();
isl::ctx Ctx = ArraySpace.get_ctx();
isl::ctx Ctx = ArraySpace.ctx();
unsigned DimsArray = SAI->getNumberOfDimensions();
isl::multi_aff DivModAff = isl::multi_aff::identity(
@ -471,7 +471,7 @@ void MemoryAccess::updateDimensionality() {
auto *SAI = getScopArrayInfo();
isl::space ArraySpace = SAI->getSpace();
isl::space AccessSpace = AccessRelation.get_space().range();
isl::ctx Ctx = ArraySpace.get_ctx();
isl::ctx Ctx = ArraySpace.ctx();
auto DimsArray = ArraySpace.dim(isl::dim::set);
auto DimsAccess = AccessSpace.dim(isl::dim::set);
@ -845,7 +845,7 @@ void MemoryAccess::buildAccessRelation(const ScopArrayInfo *SAI) {
isl::set StmtInvalidDomain = getStatement()->getInvalidDomain();
InvalidDomain = isl::set::empty(StmtInvalidDomain.get_space());
isl::ctx Ctx = Id.get_ctx();
isl::ctx Ctx = Id.ctx();
isl::id BaseAddrId = SAI->getBasePtrId();
if (getAccessInstruction() && isa<MemIntrinsic>(getAccessInstruction())) {

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@ -348,9 +348,9 @@ static isl::ast_expr buildCondition(Scop &S, isl::ast_build Build,
isl::id Right = BFirst.get_tuple_id(isl::dim::set);
isl::ast_expr True =
isl::ast_expr::from_val(isl::val::int_from_ui(Build.get_ctx(), 1));
isl::ast_expr::from_val(isl::val::int_from_ui(Build.ctx(), 1));
isl::ast_expr False =
isl::ast_expr::from_val(isl::val::int_from_ui(Build.get_ctx(), 0));
isl::ast_expr::from_val(isl::val::int_from_ui(Build.ctx(), 0));
const ScopArrayInfo *BaseLeft =
ScopArrayInfo::getFromId(Left)->getBasePtrOriginSAI();
@ -404,7 +404,7 @@ isl::ast_expr IslAst::buildRunCondition(Scop &S, const isl::ast_build &Build) {
if (S.hasTrivialInvalidContext()) {
RunCondition = std::move(PosCond);
} else {
auto ZeroV = isl::val::zero(Build.get_ctx());
auto ZeroV = isl::val::zero(Build.ctx());
auto NegCond = Build.expr_from(S.getInvalidContext());
auto NotNegCond =
isl::ast_expr::from_val(std::move(ZeroV)).eq(std::move(NegCond));

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@ -306,7 +306,7 @@ static __isl_give isl_id_to_ast_expr *pollyBuildAstExprForStmt(
return NULL;
isl::ast_build Build = isl::manage_copy(Build_C);
isl::ctx Ctx = Build.get_ctx();
isl::ctx Ctx = Build.ctx();
isl::id_to_ast_expr RefToExpr = isl::id_to_ast_expr::alloc(Ctx, 0);
Stmt->setAstBuild(Build);
@ -1158,7 +1158,7 @@ Value *GPUNodeBuilder::getArrayOffset(gpu_array_info *Array) {
return nullptr;
}
isl::ast_expr Result = isl::ast_expr::from_val(isl::val(Min.get_ctx(), 0));
isl::ast_expr Result = isl::ast_expr::from_val(isl::val(Min.ctx(), 0));
for (long i = 0, n = Min.tuple_dim(); i < n; i++) {
if (i > 0) {

File diff suppressed because it is too large Load Diff

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@ -548,7 +548,7 @@ isl::val polly::getConstant(isl::pw_aff PwAff, bool Max, bool Min) {
// TODO: If Min/Max, we can also determine a minimum/maximum value if
// Set is constant-bounded.
if (!Aff.is_cst()) {
Result = isl::val::nan(Aff.get_ctx());
Result = isl::val::nan(Aff.ctx());
return isl::stat::error();
}
@ -572,7 +572,7 @@ isl::val polly::getConstant(isl::pw_aff PwAff, bool Max, bool Min) {
}
// Not compatible
Result = isl::val::nan(Aff.get_ctx());
Result = isl::val::nan(Aff.ctx());
return isl::stat::error();
});

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@ -175,7 +175,7 @@ isl::union_pw_aff scheduleExtractDimAff(isl::union_map UMap, unsigned pos) {
/// The example schedule would be transformed to:
/// { Stmt_X[] -> [X - l_X, ...]; Stmt_B -> [l_X - u_X + 1 + Y - l_Y, ...] }
isl::union_map tryFlattenSequence(isl::union_map Schedule) {
auto IslCtx = Schedule.get_ctx();
auto IslCtx = Schedule.ctx();
auto ScatterSet = isl::set(Schedule.range());
auto ParamSpace = Schedule.get_space().params();

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@ -686,7 +686,7 @@ getMacroKernelParams(const llvm::TargetTransformInfo *TTI,
/// @return The specified access relation.
static isl::map getMatMulAccRel(isl::map MapOldIndVar, unsigned FirstDim,
unsigned SecondDim) {
auto AccessRelSpace = isl::space(MapOldIndVar.get_ctx(), 0, 9, 3);
auto AccessRelSpace = isl::space(MapOldIndVar.ctx(), 0, 9, 3);
auto AccessRel = isl::map::universe(AccessRelSpace);
AccessRel = AccessRel.equate(isl::dim::in, FirstDim, isl::dim::out, 0);
AccessRel = AccessRel.equate(isl::dim::in, 5, isl::dim::out, 1);
@ -903,7 +903,7 @@ isolateAndUnrollMatMulInnerLoops(isl::schedule_node Node,
isl::union_set IsolateOption =
getIsolateOptions(Prefix.add_dims(isl::dim::set, 3), 3);
isl::ctx Ctx = Node.get_ctx();
isl::ctx Ctx = Node.ctx();
auto Options = IsolateOption.unite(getDimOptions(Ctx, "unroll"));
Options = Options.unite(getUnrollIsolatedSetOptions(Ctx));
Node = Node.band_set_ast_build_options(Options);
@ -925,8 +925,7 @@ static isl::schedule_node markInterIterationAliasFree(isl::schedule_node Node,
if (!BasePtr)
return Node;
auto Id =
isl::id::alloc(Node.get_ctx(), "Inter iteration alias-free", BasePtr);
auto Id = isl::id::alloc(Node.ctx(), "Inter iteration alias-free", BasePtr);
return Node.insert_mark(Id).child(0);
}
@ -935,7 +934,7 @@ static isl::schedule_node markInterIterationAliasFree(isl::schedule_node Node,
/// @param Node The child of the mark node to be inserted.
/// @return The modified isl_schedule_node.
static isl::schedule_node markLoopVectorizerDisabled(isl::schedule_node Node) {
auto Id = isl::id::alloc(Node.get_ctx(), "Loop Vectorizer Disabled", nullptr);
auto Id = isl::id::alloc(Node.ctx(), "Loop Vectorizer Disabled", nullptr);
return Node.insert_mark(Id).child(0);
}

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@ -382,7 +382,7 @@ ScopArrayInfo *MaximalStaticExpander::expandAccess(Scop &S, MemoryAccess *MA) {
assert(!UpperBound.is_null() && UpperBound.is_pos() &&
!UpperBound.is_nan() &&
"The upper bound is not a positive integer.");
assert(UpperBound.le(isl::val(CurrentAccessMap.get_ctx(),
assert(UpperBound.le(isl::val(CurrentAccessMap.ctx(),
std::numeric_limits<int>::max() - 1)) &&
"The upper bound overflow a int.");
Sizes.push_back(UpperBound.get_num_si() + 1);

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@ -362,7 +362,7 @@ ScheduleTreeOptimizer::isolateFullPartialTiles(isl::schedule_node Node,
isl::union_set ScheduleRangeUSet = SchedRelUMap.range();
isl::set ScheduleRange{ScheduleRangeUSet};
isl::set IsolateDomain = getPartialTilePrefixes(ScheduleRange, VectorWidth);
auto AtomicOption = getDimOptions(IsolateDomain.get_ctx(), "atomic");
auto AtomicOption = getDimOptions(IsolateDomain.ctx(), "atomic");
isl::union_set IsolateOption = getIsolateOptions(IsolateDomain, 1);
Node = Node.parent().parent();
isl::union_set Options = IsolateOption.unite(AtomicOption);
@ -387,7 +387,7 @@ isl::schedule_node ScheduleTreeOptimizer::prevectSchedBand(
Node = isl::manage(isl_schedule_node_band_split(Node.release(), 1));
Space = isl::manage(isl_schedule_node_band_get_space(Node.get()));
auto Sizes = isl::multi_val::zero(Space);
Sizes = Sizes.set_val(0, isl::val(Node.get_ctx(), VectorWidth));
Sizes = Sizes.set_val(0, isl::val(Node.ctx(), VectorWidth));
Node =
isl::manage(isl_schedule_node_band_tile(Node.release(), Sizes.release()));
Node = isolateFullPartialTiles(Node, VectorWidth);
@ -395,12 +395,12 @@ isl::schedule_node ScheduleTreeOptimizer::prevectSchedBand(
// Make sure the "trivially vectorizable loop" is not unrolled. Otherwise,
// we will have troubles to match it in the backend.
Node = Node.band_set_ast_build_options(
isl::union_set(Node.get_ctx(), "{ unroll[x]: 1 = 0 }"));
isl::union_set(Node.ctx(), "{ unroll[x]: 1 = 0 }"));
Node = isl::manage(isl_schedule_node_band_sink(Node.release()));
Node = Node.child(0);
if (isl_schedule_node_get_type(Node.get()) == isl_schedule_node_leaf)
Node = Node.parent();
auto LoopMarker = isl::id::alloc(Node.get_ctx(), "SIMD", nullptr);
auto LoopMarker = isl::id::alloc(Node.ctx(), "SIMD", nullptr);
PrevectOpts++;
return Node.insert_mark(LoopMarker);
}
@ -574,7 +574,7 @@ char IslScheduleOptimizerWrapperPass::ID = 0;
#ifndef NDEBUG
static void printSchedule(llvm::raw_ostream &OS, const isl::schedule &Schedule,
StringRef Desc) {
isl::ctx Ctx = Schedule.get_ctx();
isl::ctx Ctx = Schedule.ctx();
isl_printer *P = isl_printer_to_str(Ctx.get());
P = isl_printer_set_yaml_style(P, ISL_YAML_STYLE_BLOCK);
P = isl_printer_print_schedule(P, Schedule.get());
@ -876,7 +876,7 @@ static void runScheduleOptimizerPrinter(raw_ostream &OS,
return;
}
p = isl_printer_to_str(LastSchedule.get_ctx().get());
p = isl_printer_to_str(LastSchedule.ctx().get());
p = isl_printer_set_yaml_style(p, ISL_YAML_STYLE_BLOCK);
p = isl_printer_print_schedule(p, LastSchedule.get());
ScheduleStr = isl_printer_get_str(p);

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@ -217,7 +217,7 @@ struct ExtensionNodeRewriter
isl::schedule visitLeaf(const isl::schedule_node &Leaf,
const isl::union_set &Domain,
isl::union_map &Extensions) {
isl::ctx Ctx = Leaf.get_ctx();
isl::ctx Ctx = Leaf.ctx();
Extensions = isl::union_map::empty(isl::space::params_alloc(Ctx, 0));
return isl::schedule::from_domain(Domain);
}
@ -536,7 +536,7 @@ isl::schedule polly::hoistExtensionNodes(isl::schedule Sched) {
}
isl::schedule polly::applyFullUnroll(isl::schedule_node BandToUnroll) {
isl::ctx Ctx = BandToUnroll.get_ctx();
isl::ctx Ctx = BandToUnroll.ctx();
// Remove the loop's mark, the loop will disappear anyway.
BandToUnroll = removeMark(BandToUnroll);
@ -589,7 +589,7 @@ isl::schedule polly::applyFullUnroll(isl::schedule_node BandToUnroll) {
isl::schedule polly::applyPartialUnroll(isl::schedule_node BandToUnroll,
int Factor) {
assert(Factor > 0 && "Positive unroll factor required");
isl::ctx Ctx = BandToUnroll.get_ctx();
isl::ctx Ctx = BandToUnroll.ctx();
// Remove the mark, save the attribute for later use.
BandAttr *Attr;
@ -673,7 +673,7 @@ isl::union_set polly::getIsolateOptions(isl::set IsolateDomain,
IsolateRelation = IsolateRelation.move_dims(isl::dim::out, 0, isl::dim::in,
Dims - OutDimsNum, OutDimsNum);
isl::set IsolateOption = IsolateRelation.wrap();
isl::id Id = isl::id::alloc(IsolateOption.get_ctx(), "isolate", nullptr);
isl::id Id = isl::id::alloc(IsolateOption.ctx(), "isolate", nullptr);
IsolateOption = IsolateOption.set_tuple_id(Id);
return isl::union_set(IsolateOption);
}
@ -697,11 +697,10 @@ isl::schedule_node polly::tileNode(isl::schedule_node Node,
for (auto i : seq<isl_size>(0, Dims)) {
auto tileSize =
i < (isl_size)TileSizes.size() ? TileSizes[i] : DefaultTileSize;
Sizes = Sizes.set_val(i, isl::val(Node.get_ctx(), tileSize));
Sizes = Sizes.set_val(i, isl::val(Node.ctx(), tileSize));
}
auto TileLoopMarkerStr = IdentifierString + " - Tiles";
auto TileLoopMarker =
isl::id::alloc(Node.get_ctx(), TileLoopMarkerStr, nullptr);
auto TileLoopMarker = isl::id::alloc(Node.ctx(), TileLoopMarkerStr, nullptr);
Node = Node.insert_mark(TileLoopMarker);
Node = Node.child(0);
Node =
@ -709,7 +708,7 @@ isl::schedule_node polly::tileNode(isl::schedule_node Node,
Node = Node.child(0);
auto PointLoopMarkerStr = IdentifierString + " - Points";
auto PointLoopMarker =
isl::id::alloc(Node.get_ctx(), PointLoopMarkerStr, nullptr);
isl::id::alloc(Node.ctx(), PointLoopMarkerStr, nullptr);
Node = Node.insert_mark(PointLoopMarker);
return Node.child(0);
}
@ -718,6 +717,6 @@ isl::schedule_node polly::applyRegisterTiling(isl::schedule_node Node,
ArrayRef<int> TileSizes,
int DefaultTileSize) {
Node = tileNode(Node, "Register tiling", TileSizes, DefaultTileSize);
auto Ctx = Node.get_ctx();
auto Ctx = Node.ctx();
return Node.band_set_ast_build_options(isl::union_set(Ctx, "{unroll[x]}"));
}

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@ -776,8 +776,8 @@ isl::map ZoneAlgorithm::makeValInst(Value *Val, ScopStmt *UserStmt, Loop *Scope,
// Construct the SCEV space.
// TODO: Add only the induction variables referenced in SCEVAddRecExpr
// expressions, not just all of them.
auto ScevId = isl::manage(isl_id_alloc(
UseDomainSpace.get_ctx().get(), nullptr, const_cast<SCEV *>(ScevExpr)));
auto ScevId = isl::manage(isl_id_alloc(UseDomainSpace.ctx().get(), nullptr,
const_cast<SCEV *>(ScevExpr)));
auto ScevSpace = UseDomainSpace.drop_dims(isl::dim::set, 0, 0);
ScevSpace = ScevSpace.set_tuple_id(isl::dim::set, ScevId);