forked from OSchip/llvm-project
Add AVX versions to match AESENC/AESDEC intrinsics. This hopefully ends
the cycle of missing AVX counterparts of already present SSE* patterns llvm-svn: 139073
This commit is contained in:
parent
1d5c2d9227
commit
07d9914620
|
@ -6197,22 +6197,43 @@ let Constraints = "$src1 = $dst" in {
|
|||
int_x86_aesni_aesdeclast>;
|
||||
}
|
||||
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
|
||||
(AESENCrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
|
||||
(AESENCrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, VR128:$src2)),
|
||||
(AESENCLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, (memop addr:$src2))),
|
||||
(AESENCLASTrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, VR128:$src2)),
|
||||
(AESDECrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, (memop addr:$src2))),
|
||||
(AESDECrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
|
||||
(AESDECLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
|
||||
(AESDECLASTrm VR128:$src1, addr:$src2)>;
|
||||
let Predicates = [HasAES] in {
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
|
||||
(AESENCrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
|
||||
(AESENCrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, VR128:$src2)),
|
||||
(AESENCLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, (memop addr:$src2))),
|
||||
(AESENCLASTrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, VR128:$src2)),
|
||||
(AESDECrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, (memop addr:$src2))),
|
||||
(AESDECrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
|
||||
(AESDECLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
|
||||
(AESDECLASTrm VR128:$src1, addr:$src2)>;
|
||||
}
|
||||
|
||||
let Predicates = [HasAVX, HasAES], AddedComplexity = 20 in {
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
|
||||
(VAESENCrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
|
||||
(VAESENCrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, VR128:$src2)),
|
||||
(VAESENCLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, (memop addr:$src2))),
|
||||
(VAESENCLASTrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, VR128:$src2)),
|
||||
(VAESDECrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, (memop addr:$src2))),
|
||||
(VAESDECrm VR128:$src1, addr:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
|
||||
(VAESDECLASTrr VR128:$src1, VR128:$src2)>;
|
||||
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
|
||||
(VAESDECLASTrm VR128:$src1, addr:$src2)>;
|
||||
}
|
||||
|
||||
// Perform the AES InvMixColumn Transformation
|
||||
let Predicates = [HasAVX, HasAES] in {
|
||||
|
|
Loading…
Reference in New Issue