forked from OSchip/llvm-project
Fixed a bug in masked load/store in reversed loop.
Added a test. The bug was submitted to bugzilla: http://llvm.org/bugs/show_bug.cgi?id=22225 llvm-svn: 226791
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@ -1875,6 +1875,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr) {
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// wide store needs to start at the last vector element.
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PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF));
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PartPtr = Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF));
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Mask[Part] = reverseVector(Mask[Part]);
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}
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Value *VecPtr = Builder.CreateBitCast(PartPtr,
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@ -1903,6 +1904,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr) {
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// wide load needs to start at the last vector element.
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PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF));
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PartPtr = Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF));
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Mask[Part] = reverseVector(Mask[Part]);
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}
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Instruction* NewLI;
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@ -418,3 +418,85 @@ for.end: ; preds = %for.cond
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ret void
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}
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; Reverse loop
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;void foo6(double *in, double *out, unsigned size, int *trigger) {
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;
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; for (int i=SIZE-1; i>=0; i--) {
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; if (trigger[i] > 0) {
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; out[i] = in[i] + (double) 0.5;
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; }
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; }
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;}
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;AVX2-LABEL: @foo6
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;AVX2: icmp sgt <4 x i32> %reverse, zeroinitializer
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;AVX2: shufflevector <4 x i1>{{.*}}<4 x i32> <i32 3, i32 2, i32 1, i32 0>
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;AVX2: call <4 x double> @llvm.masked.load.v4f64
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;AVX2: fadd <4 x double>
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;AVX2: call void @llvm.masked.store.v4f64
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;AVX2: ret void
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;AVX512-LABEL: @foo6
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;AVX512: icmp sgt <8 x i32> %reverse, zeroinitializer
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;AVX512: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5, i32 4
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;AVX512: call <8 x double> @llvm.masked.load.v8f64
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;AVX512: fadd <8 x double>
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;AVX512: call void @llvm.masked.store.v8f64
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;AVX512: ret void
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define void @foo6(double* %in, double* %out, i32 %size, i32* %trigger) {
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entry:
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%in.addr = alloca double*, align 8
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%out.addr = alloca double*, align 8
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%size.addr = alloca i32, align 4
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%trigger.addr = alloca i32*, align 8
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%i = alloca i32, align 4
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store double* %in, double** %in.addr, align 8
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store double* %out, double** %out.addr, align 8
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store i32 %size, i32* %size.addr, align 4
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store i32* %trigger, i32** %trigger.addr, align 8
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store i32 4095, i32* %i, align 4
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br label %for.cond
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for.cond: ; preds = %for.inc, %entry
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%0 = load i32* %i, align 4
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%cmp = icmp sge i32 %0, 0
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%1 = load i32* %i, align 4
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%idxprom = sext i32 %1 to i64
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%2 = load i32** %trigger.addr, align 8
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%arrayidx = getelementptr inbounds i32* %2, i64 %idxprom
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%3 = load i32* %arrayidx, align 4
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%cmp1 = icmp sgt i32 %3, 0
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br i1 %cmp1, label %if.then, label %if.end
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if.then: ; preds = %for.body
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%4 = load i32* %i, align 4
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%idxprom2 = sext i32 %4 to i64
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%5 = load double** %in.addr, align 8
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%arrayidx3 = getelementptr inbounds double* %5, i64 %idxprom2
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%6 = load double* %arrayidx3, align 8
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%add = fadd double %6, 5.000000e-01
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%7 = load i32* %i, align 4
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%idxprom4 = sext i32 %7 to i64
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%8 = load double** %out.addr, align 8
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%arrayidx5 = getelementptr inbounds double* %8, i64 %idxprom4
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store double %add, double* %arrayidx5, align 8
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br label %if.end
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if.end: ; preds = %if.then, %for.body
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br label %for.inc
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for.inc: ; preds = %if.end
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%9 = load i32* %i, align 4
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%dec = add nsw i32 %9, -1
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store i32 %dec, i32* %i, align 4
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br label %for.cond
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for.end: ; preds = %for.cond
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ret void
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}
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